Issued Patents 2016
Showing 25 most recent of 92 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9530669 | Method of making a semiconductor device having a semiconductor material on a relaxed semiconductor including replacing a strained, selective etchable material, with a low density dielectric in a cavity | Karthik Balakrishnan, Kangguo Cheng, Alexander Reznicek | 2016-12-27 |
| 9530772 | Methods of manufacturing devices including gates with multiple lengths | Karthik Balakrishnan, Kangguo Cheng, Alexander Reznicek | 2016-12-27 |
| 9524969 | Integrated circuit having strained fins on bulk substrate | Karthik Balakrishnan, Kangguo Cheng, Alexander Reznicek | 2016-12-20 |
| 9525027 | Lateral bipolar junction transistor having graded SiGe base | Ali Khakifirooz, Darsen D. Lu, Alexander Reznicek, Dominic J. Schepis | 2016-12-20 |
| 9525064 | Channel-last replacement metal-gate vertical field effect transistor | Karthik Balakrishnan, Kangguo Cheng, Alexander Reznicek | 2016-12-20 |
| 9520469 | Fabrication of fin structures having high germanium content | Karthik Balakrishnan, Kangguo Cheng, Alexander Reznicek | 2016-12-13 |
| 9520328 | Type III-V and type IV semiconductor device formation | Kangguo Cheng, Bruce B. Doris, Ali Khakifirooz, Alexander Reznicek | 2016-12-13 |
| 9520397 | Abrupt source/drain junction formation using a diffusion facilitation layer | Kangguo Cheng, Bruce B. Doris, Ali Khakifirooz, Alexander Reznicek | 2016-12-13 |
| 9514997 | Silicon-germanium FinFET device with controlled junction | Kangguo Cheng, Kam-Leung Lee, Alexander Reznicek | 2016-12-06 |
| 9515173 | Method of fabricating electrostatically enhanced fins and stacked nanowire field effect transistors | Kangguo Cheng, Bruce B. Doris, Ali Khakifirooz, Alexander Reznicek | 2016-12-06 |
| 9515194 | Nano-ribbon channel transistor with back-bias control | Karthik Balakrishnan, Kangguo Cheng, Alexander Reznicek | 2016-12-06 |
| 9508810 | FET with air gap spacer for improved overlap capacitance | Kangguo Cheng, Ali Khakifirooz, Alexander Reznicek | 2016-11-29 |
| 9508851 | Formation of bulk SiGe fin with dielectric isolation by anodization | Thomas N. Adam, Kangguo Cheng, Bruce B. Doris, Ali Khakifirooz, Alexander Reznicek | 2016-11-29 |
| 9502243 | Multi-orientation SOI substrates for co-integration of different conductivity type semiconductor devices | Kangguo Cheng, Bruce B. Doris, Ali Khakifirooz, Alexander Reznicek | 2016-11-22 |
| 9502245 | Elimination of defects in long aspect ratio trapping trench structures | Kangguo Cheng, Ali Khakifirooz, Alexander Reznicek | 2016-11-22 |
| 9496400 | FinFET with stacked faceted S/D epitaxy for improved contact resistance | Karthik Balakrishnan, Kangguo Cheng, Alexander Reznicek | 2016-11-15 |
| 9496263 | Stacked strained and strain-relaxed hexagonal nanowires | Takashi Ando, John A. Ott, Alexander Reznicek | 2016-11-15 |
| 9496373 | Damage-resistant fin structures and FinFET CMOS | Kangguo Cheng, Ali Khakifirooz, Alexander Reznicek | 2016-11-15 |
| 9496401 | III-V device structure with multiple threshold voltage | Kangguo Cheng, Keith E. Fogel, Alexander Reznicek | 2016-11-15 |
| 9496260 | Tall strained high percentage silicon germanium fins for CMOS | Karthik Balakrishnan, Kangguo Cheng, Alexander Reznicek | 2016-11-15 |
| 9490332 | Atomic layer doping and spacer engineering for reduced external resistance in finFETs | Karthik Balakrishnan, Kevin K. Chan | 2016-11-08 |
| 9490161 | Channel SiGe devices with multiple threshold voltages on hybrid oriented substrates, and methods of manufacturing same | Bruce B. Doris, Lisa F. Edge, Alexander Reznicek | 2016-11-08 |
| 9484266 | Complementary heterogeneous MOSFET using global SiGe substrate and hard-mask memorized germanium dilution for nFET | Karthik Balakrishnan, Kangguo Cheng, Alexander Reznicek | 2016-11-01 |
| 9484405 | Stacked nanowire devices formed using lateral aspect ratio trapping | Karthik Balakrishnan, Kangguo Cheng, Alexander Reznicek | 2016-11-01 |
| 9483592 | Maintaining stress in a layout design of an integrated circuit having fin-type field-effect transistor devices | Karthik Balakrishnan, Jeffrey W. Sleight, Tenko Yamashita | 2016-11-01 |