Issued Patents 2016
Showing 26–50 of 87 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9455330 | Recessing RMG metal gate stack for forming self-aligned contact | Xiuyu Cai, Kangguo Cheng, Ali Khakifirooz | 2016-09-27 |
| 9455254 | Methods of forming a combined gate and source/drain contact structure and the resulting device | Andre P. Labonte, Su Chen Fan, Balasubramanian S. Pranatharthi Haran | 2016-09-27 |
| 9449881 | Methods of forming fins for FinFET semiconductor devices and the resulting devices | Min Gyu Sung | 2016-09-20 |
| 9443976 | Integrated circuit product comprising lateral and vertical FinFet devices | Andreas Knorr | 2016-09-13 |
| 9437501 | Stacked nanowire device width adjustment by gas cluster ion beam (GCIB) | Kangguo Cheng, Xin Miao, Tenko Yamashita | 2016-09-06 |
| 9431540 | Method for making a semiconductor device with sidewall spacers for confining epitaxial growth | Qing Liu, Xiuyu Cai, Chun-Chen Yeh | 2016-08-30 |
| 9431507 | Replacement gate structure with low-K sidewall spacer for semiconductor devices | Kisik Choi | 2016-08-30 |
| 9425106 | Methods of performing fin cut etch processes for taper FinFET semiconductor devices and the resulting devices | Min Gyu Sung, Chanro Park, Hoon Kim | 2016-08-23 |
| 9425319 | Integrated circuits including FINFET devices with lower contact resistance and reduced parasitic capacitance and methods for fabricating the same | Xiuyu Cai, Ali Khakifirooz, Kangguo Cheng | 2016-08-23 |
| 9425280 | Semiconductor device with low-K spacers | Xiuyu Cai, Xunyuan Zhang | 2016-08-23 |
| 9425103 | Methods of using a metal protection layer to form replacement gate structures for semiconductor devices | Chanro Park, Sean Xuan Lin | 2016-08-23 |
| 9412660 | Methods of forming V0 structures for semiconductor devices that includes recessing a contact structure | Xunyuan Zhang | 2016-08-09 |
| 9412822 | Methods of forming stressed channel regions for a FinFET semiconductor device and the resulting device | Xiuyu Cai, Kangguo Cheng, Ali Khakifirooz, Ajey Poovannummoottil Jacob, Witold P. Maszara | 2016-08-09 |
| 9412740 | Integrated circuit product with a gate height registration structure | Michael Wedlake, Xiuyu Cai, Ali Khakifirooz, Kangguo Cheng | 2016-08-09 |
| 9412695 | Interconnect structures and methods of fabrication | Hiroaki Niimi, Andreas Knorr | 2016-08-09 |
| 9412616 | Methods of forming single and double diffusion breaks on integrated circuit products comprised of FinFET devices and the resulting products | Kwan-Yong Lim, Min Gyu Sung, Ryan Ryoung-Han Kim | 2016-08-09 |
| 9406751 | Method for making strained semiconductor device and related methods | Qing Liu, Xiuyu Cai, Chun-Chen Yeh | 2016-08-02 |
| 9406767 | POC process flow for conformal recess fill | Andrew M. Greene, Sanjay C. Mehta, Balasubramanian Pranatharthiharan | 2016-08-02 |
| 9401408 | Confined early epitaxy with local interconnect capability | Andreas Knorr | 2016-07-26 |
| 9397003 | Method for forming source/drain contacts during CMOS integration using confined epitaxial growth techniques | Hiroaki Niimi | 2016-07-19 |
| 9391200 | FinFETs having strained channels, and methods of fabricating finFETs having strained channels | Qing Liu, Xiuyu Cai, Chun-Chen Yeh | 2016-07-12 |
| 9391174 | Method of uniform fin recessing using isotropic etch | Min Gyu Sung, Chanro Park, Hoon Kim | 2016-07-12 |
| 9391075 | Integrated circuit and method for fabricating the same having a replacement gate structure | Pranatharthi Haran Balasubramanian | 2016-07-12 |
| 9390939 | Methods of forming MIS contact structures for semiconductor devices and the resulting devices | Xiuyu Cai, Kangguo Cheng, Ali Khakifirooz | 2016-07-12 |
| 9385201 | Buried source-drain contact for integrated circuit transistor devices and method of making same | Qing Liu, Chun-Chen Yeh, Xiuyu Cai, William J. Taylor, Jr. | 2016-07-05 |