Issued Patents 2016
Showing 1–22 of 22 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9508604 | Methods of forming punch through stop regions on FinFET devices on CMOS-based IC products using doped spacers | Min Gyu Sung, Chanro Park, Ruilong Xie | 2016-11-29 |
| 9502308 | Methods for forming transistor devices with different source/drain contact liners and the resulting devices | Chanro Park, Ruilong Xie, Min Gyu Sung | 2016-11-22 |
| 9502286 | Methods of forming self-aligned contact structures on semiconductor devices and the resulting devices | Ruilong Xie, Chanro Park, Min Gyu Sung, Andre P. Labonte | 2016-11-22 |
| 9496143 | Metal gate structure for midgap semiconductor device and method of making same | Kisik Choi | 2016-11-15 |
| 9484449 | Integrated circuits with diffusion barrier layers and processes for preparing integrated circuits including diffusion barrier layers | Rohit Galatage | 2016-11-01 |
| 9478538 | Methods for forming transistor devices with different threshold voltages and the resulting devices | Ruilong Xie, Min Gyu Sung, Chanro Park | 2016-10-25 |
| 9478661 | Semiconductor device structures with self-aligned fin structure(s) and fabrication methods thereof | Ruilong Xie, Chanro Park, Min Gyu Sung | 2016-10-25 |
| 9461171 | Methods of increasing silicide to epi contact areas and the resulting devices | Ruilong Xie, Naim Moumen, Chanro Park, William J. Taylor, Jr. | 2016-10-04 |
| 9425106 | Methods of performing fin cut etch processes for taper FinFET semiconductor devices and the resulting devices | Ruilong Xie, Min Gyu Sung, Chanro Park | 2016-08-23 |
| 9395620 | Pellicle | — | 2016-07-19 |
| 9391174 | Method of uniform fin recessing using isotropic etch | Min Gyu Sung, Ruilong Xie, Chanro Park | 2016-07-12 |
| 9379017 | Method of forming a semiconductor structure including a plurality of fins and an alignment/overlay mark | Min Gyu Sung, Chanro Park, Ruilong Xie | 2016-06-28 |
| 9373542 | Integrated circuits and methods for fabricating integrated circuits with improved contact structures | Xunyuan Zhang, Xiuyu Cai | 2016-06-21 |
| 9362377 | Low line resistivity and repeatable metal recess using CVD cobalt reflow | Vimal Kamineni, Min Gyu Sung, Chanro Park | 2016-06-07 |
| 9362283 | Gate structures for transistor devices for CMOS applications and products | Zhendong Hong, Susie Tzeng, Amol Joshi, Ashish Bodke, Divya Pisharoty +6 more | 2016-06-07 |
| 9337101 | Methods for selectively removing a fin when forming FinFET devices | Min Gyu Sung, Chanro Park, Ruilong Xie | 2016-05-10 |
| 9312388 | Methods of forming epitaxial semiconductor material in trenches located above the source and drain regions of a semiconductor device | Ruilong Xie, Chanro Park, Min Gyu Sung | 2016-04-12 |
| 9312183 | Methods for forming FinFETS having a capping layer for reducing punch through leakage | Min Gyu Sung | 2016-04-12 |
| 9293333 | FinFET work function metal formation | Hui Zang | 2016-03-22 |
| 9263541 | Alternative gate dielectric films for silicon germanium and germanium channel materials | Shariq Siddiqui, Bhagawan Sahu, Rohit Galatage | 2016-02-16 |
| 9245968 | Field effect transistor and method of fabrication | Kisik Choi, Chanro Park | 2016-01-26 |
| 9236299 | Methods of forming a metal cap layer on copper-based conductive structures on an integrated circuit device | Xunyuan Zhang, Christian Witt, Larry Zhao | 2016-01-12 |