Issued Patents 2003
Showing 1–25 of 55 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6670271 | Growing a dual damascene structure using a copper seed layer and a damascene resist structure | Michael K. Templeton, Bhanwar Singh, Bharath Rangarajan | 2003-12-30 |
| 6663723 | Vapor drying for cleaning photoresists | Michael K. Templeton, Khoi A. Phan, Bharath Rangarajan | 2003-12-16 |
| 6660645 | Process for etching an organic dielectric using a silyated photoresist mask | Scott A. Bell, Todd P. Lukanc, Christopher F. Lyons, Marina V. Plat | 2003-12-09 |
| 6656830 | Dual damascene with silicon carbide middle etch stop layer/ARC | Dawn Hopper, Fei Wang, Lynne A. Okada | 2003-12-02 |
| 6656763 | Spin on polymers for organic memory devices | Jane V. Oglesby, Christopher F. Lyons, Angela T. Hui, Minh Van Ngo, Suzette K. Pangrle | 2003-12-02 |
| 6653221 | Method of forming a ground in SOI structures | Bharath Rangarajan, Bhanwar Singh | 2003-11-25 |
| 6654660 | Controlling thermal expansion of mask substrates by scatterometry | Bhanwar Singh, Christopher F. Lyons, Bharath Rangarajan, Khoi A. Phan | 2003-11-25 |
| 6650422 | Scatterometry techniques to ascertain asymmetry profile of features and generate a feedback or feedforward process control data associated therewith | Bhanwar Singh, Michael K. Templeton, Bharath Rangarajan | 2003-11-18 |
| 6641963 | System and method for in situ control of post exposure bake time and temperature | Bharath Rangarajan, Michael K. Templeton, Bhanwar Singh | 2003-11-04 |
| 6643604 | System for uniformly heating photoresist | Michael K. Templeton, Bharath Rangarajan | 2003-11-04 |
| 6634805 | Parallel plate development | Michael K. Templeton, Khoi A. Phan, Bharath Rangarajan, Bryan K. Choo | 2003-10-21 |
| 6633392 | X-ray reflectance system to determine suitability of SiON ARC layer | Bhanwar Singh, Arvind Halliyal | 2003-10-14 |
| 6632707 | Method for forming an interconnect structure using a CVD organic BARC to mitigate via poisoning | Fei Wang, Lynne A. Okada, James Kai, Calvin T. Gabriel, Lu You | 2003-10-14 |
| 6632283 | System and method for illuminating a semiconductor processing system | Bhanwar Singh, Bharath Rangarajan, Khoi A. Phan, Bryan K. Choo | 2003-10-14 |
| 6629786 | Active control of developer time and temperature | Bharath Rangarajan, Michael K. Templeton, Bhanwar Singh | 2003-10-07 |
| 6630361 | Use of scatterometry for in-situ control of gaseous phase chemical trim process | Bhanwar Singh, Bharath Rangarajan, Michael K. Templeton, Cristina Cheung | 2003-10-07 |
| 6622547 | System and method for facilitating selection of optimized optical proximity correction | Khoi A. Phan, Bhanwar Singh | 2003-09-23 |
| 6624642 | Metal bridging monitor for etch and CMP endpoint detection | Christopher F. Lyons, Steven C. Avanzino | 2003-09-23 |
| 6617087 | Use of scatterometry to measure pattern accuracy | Bharath Rangarajan, Bhanwar Singh | 2003-09-09 |
| 6613500 | Reducing resist residue defects in open area on patterned wafer using trim mask | Khoi A. Phan, Bhanwar Singh, Michael K. Templeton, Jeff P. Erhardt | 2003-09-02 |
| 6605413 | Chemical treatment to strengthen photoresists to prevent pattern collapse | Christopher F. Lyons | 2003-08-12 |
| 6605546 | Dual bake for BARC fill without voids | Wolfram Grundke, Bhanwar Singh, Christopher F. Lyons, Marina V. Plat | 2003-08-12 |
| 6605855 | CVD plasma process to fill contact hole in damascene process | Bhanwar Singh, Michael K. Templeton, Bharath Rangarajan, Christopher F. Lyons, Sanjay K. Yedur | 2003-08-12 |
| 6602727 | Scatterometry based active control of exposure conditions | Bharath Rangarajan, Bhanwar Singh | 2003-08-05 |
| 6603206 | Slot via filled dual damascene interconnect structure without middle etch stop layer | Fei Wang, Lynne A. Okada, Calvin T. Gabriel | 2003-08-05 |