HT

Hien Boon Tan

UC United Test And Assembly Center: 11 patents #2 of 65Top 4%
SS St Assembly Test Services: 2 patents #21 of 63Top 35%
SP St Assembly Test Services Pte: 1 patents #25 of 50Top 50%
UP Utac Headquarters Pte.: 1 patents #56 of 101Top 60%
📍 Singapore, SG: #333 of 13,971 inventorsTop 3%
Overall (All Time): #256,652 of 4,157,543Top 7%
18
Patents All Time

Issued Patents All Time

Showing 1–18 of 18 patents

Patent #TitleCo-InventorsDate
9842792 Method of producing a semiconductor package Danny Retuta, Anthony Yi Sheng Sun, Mary Annie Cheong 2017-12-12
9281218 Method of producing a semiconductor package Danny Retuta, Anthony Yi Sheng Sun, Mary Annie Cheong 2016-03-08
8129222 High density chip scale leadframe package and method of manufacturing the package Anthony Yi Sheng Sun 2012-03-06
8039951 Thermally enhanced semiconductor package and method of producing the same Kolan Ravi Kanth, Danny Retuta, Anthony Sun-Yi Sheng, Susanto Tanary, Patrick Low Tse Hoong 2011-10-18
8030768 Semiconductor package with under bump metallization aligned with open vias Roel Adeva Robles, Danny Retuta, Mary Annie Cheong, Anthony Yi Sheng Sun, Richard Te Gan 2011-10-04
7830006 Structurally-enhanced integrated circuit package and method of manufacture Ravi Kanth Kolan, Anthony Yi Sheng Sun, Beng Kuan Lim, Krishnamoorthi Sivalingam 2010-11-09
7816775 Multi-die IC package and manufacturing method Chuen Khiang Wang, Hao Liu, Clifton Teik Lyk Law, Rahamat Bidin, Anthony Yi Sheng Sun 2010-10-19
7723833 Stacked die packages Gaurav Mehta, Susanto Tanary, Mary Annie Cheong, Anthony Yi Sheng Sun, Chuen Khiang Wang 2010-05-25
7678610 Semiconductor chip package and method of manufacture Chuen Khiang Wang, Anthony Yi Sheng Sun, Sin Nee Song, Steven Yu Feng Yao, Hua Tan 2010-03-16
7476569 Leadframe enhancement and method of producing a multi-row semiconductor package Danny Retuta, Susanto Tanary, Anthony Yi Sheng Sun, Soon Huat Tan 2009-01-13
7375416 Leadframe enhancement and method of producing a multi-row semiconductor package Danny Retuta, Susanto Tanary, Anthony Yi Sheng Sun, Soon Huat Tan 2008-05-20
7345357 High density chip scale leadframe package and method of manufacturing the package Anthony Yi Sheng Sun 2008-03-18
7339278 Cavity chip package Henry Iksan, Seong Kwang Kim, Susanto Tanary, Yi-Sheng Anthony Sun 2008-03-04
7323769 High performance chip scale leadframe package with thermal dissipating structure and annular element and method of manufacturing package Anthony Yi Sheng Sun, Francis Poh 2008-01-29
7109570 Integrated circuit package with leadframe enhancement and method of manufacturing the same Rodel Manalac, Francis Poh, Jaime Siat, Roland Cordero 2006-09-19
6876069 Ground plane for exposed package Jefferey D. Punzalan, Zheng Zheng, Jae Hak Yee, Byung Joon Han 2005-04-05
6630373 Ground plane for exposed package Jeffrey D. Punzalan, Zheng Zheng, Jae Hak Yee, Byung Joon Han 2003-10-07
6420779 Leadframe based chip scale package and method of producing the same Nirmal Sharma, Rahamat Bidin 2002-07-16