Issued Patents All Time
Showing 376–400 of 636 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8780576 | Low CTE interposer | Kishor Desai | 2014-07-15 |
| 8772946 | Reduced stress TSV and interposer structures | Cyprian Emeka Uzoh, Charles G. Woychik, Terrence Caskey, Kishor Desai, Huailiang Wei +1 more | 2014-07-08 |
| 8772908 | Conductive pads defined by embedded traces | — | 2014-07-08 |
| 8759973 | Microelectronic assemblies having compliancy and methods therefor | Vage Oganesian, Guilian Gao, David Ovrutsky | 2014-06-24 |
| 8759982 | Deskewed multi-die packages | Richard Dewitt Crisp, Wael Zohni | 2014-06-24 |
| 8742541 | High density three-dimensional integrated capacitors | Ilyas Mohammed, Cyprian Emeka Uzoh, Piyush Savalia, Vage Oganesian | 2014-06-03 |
| 8735205 | Chips having rear contacts connected by through vias to front contacts | Kenneth Honer, David B. Tuckerman, Vage Oganesian | 2014-05-27 |
| 8736066 | Stacked microelectronic assemby with TSVS formed in stages and carrier above chip | Vage Oganesian, Ilyas Mohammed, Craig Mitchell, Piyush Savalia | 2014-05-27 |
| 8735287 | Semiconductor packaging process using through silicon vias | Giles Humpston, Moti Margalit | 2014-05-27 |
| 8728865 | Microelectronic packages and methods therefor | Teck-Gyu Kang, Ilyas Mohammed, Ellis Chau | 2014-05-20 |
| 8723318 | Microelectronic packages with dual or multiple-etched flip-chip connectors | — | 2014-05-13 |
| 8723329 | In-package fly-by signaling | Richard Dewitt Crisp, Wael Zohni, Yong-Syuan Chen | 2014-05-13 |
| 8709933 | Interposer having molded low CTE dielectric | Ilyas Mohammed | 2014-04-29 |
| 8709913 | Simultaneous wafer bonding and interconnect joining | Vage Oganesian, Ilyas Mohammed, Piyush Savalia, Craig Mitchell | 2014-04-29 |
| 8704347 | Packaged semiconductor chips | Andrey Grinman, David Ovrutsky, Charles Rosenstein, Vage Oganesian | 2014-04-22 |
| 8698323 | Microelectronic assembly tolerant to misplacement of microelectronic elements therein | Ilyas Mohammed | 2014-04-15 |
| 8697492 | No flow underfill | Ilyas Mohammed, Ellis Chau, Sang Il Lee, Kishor Desai | 2014-04-15 |
| 8697569 | Non-lithographic formation of three-dimensional conductive elements | Vage Oganesian, Ilyas Mohammed, Craig Mitchell, Piyush Savalia | 2014-04-15 |
| 8686551 | Substrate for a microelectronic package and method of fabricating thereof | Craig Mitchell, Apolinar Alvarez, Jr. | 2014-04-01 |
| 8685793 | Chip assembly having via interconnects joined by plating | Vage Oganesian, Ilyas Mohammed, Craig Mitchell, Piyush Savalia | 2014-04-01 |
| 8686565 | Stacked chip assembly having vertical vias | Vage Oganesian, Ilyas Mohammed, Craig Mitchell, Piyush Savalia | 2014-04-01 |
| 8680662 | Wafer level edge stacking | Ilyas Mohammed, Laura Wills Mirkarimi, Moshe Kriman | 2014-03-25 |
| 8680684 | Stackable microelectronic package structures | Kyong-Mo Bang | 2014-03-25 |
| 8670261 | Stub minimization using duplicate sets of signal terminals | Richard Dewitt Crisp, Wael Zohni, Frank Lambrecht | 2014-03-11 |
| 8659164 | Microelectronic package with terminals on dielectric mass | — | 2014-02-25 |