Issued Patents All Time
Showing 26–50 of 253 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11239142 | Package structure and method for forming the same | Chih-Fan Huang, Hsiang-Ku Shen, Hui-Chi Chen, Dian-Hau Chen, Yen-Ming Chen | 2022-02-01 |
| 11222826 | FinFET structure and device | Yen-Chun Huang, Chih-Tang Peng, Kuang-Yuan Hsu, Tai-Chun Huang, Tsu-Hsiu Perng | 2022-01-11 |
| 11171041 | Etch damage and ESL free dual damascene metal interconnect | Sunil Kumar Singh, Chung-Ju Lee | 2021-11-09 |
| 11125940 | Method of fabrication polymer waveguide | Chun-Hao Tseng, Wan-Yu Lee, Hai-Ching Chen | 2021-09-21 |
| 11087994 | Via connection to a partially filled trench | Shih-Ming Chang, Chih-Ming Lai, Ru-Gun Liu, Tsai-Sheng Gau, Chung-Ju Lee +1 more | 2021-08-10 |
| 11062901 | Low-k dielectric and processes for forming same | Chia-Cheng Chou, Po-Cheng Shih, Li Chun Te | 2021-07-13 |
| 11049811 | Forming interlayer dielectric material by spin-on metal oxide deposition | Chi-Lin Teng, Jung-Hsun Tsai, Kai-Fang Cheng, Hsin-Yen Huang, Hai-Ching Chen | 2021-06-29 |
| 11011421 | Semiconductor device having voids and method of forming same | Yung-Hsu Wu, Chien-Hua Huang, Chung-Ju Lee, Shau-Lin Shue | 2021-05-18 |
| 10983278 | Adhesion promoter apparatus and method | Chun-Hao Tseng, Ying-Hao Kuo, Kai-Fang Cheng, Hai-Ching Chen | 2021-04-20 |
| 10943867 | Schemes for forming barrier layers for copper in interconnect structures | Chen-Hua Yu, Hai-Ching Chen | 2021-03-09 |
| 10943820 | Gap-fill method having improved gap-fill capability | Wan-Yi Kao, Wei LI, Chung-Chi Ko, Yu-Cheng Shiau, Han-Sheng Weng +1 more | 2021-03-09 |
| 10910216 | Low-k dielectric and processes for forming same | Chia-Cheng Chou, Li Chun Te, Po-Cheng Shih | 2021-02-02 |
| 10867922 | Porogen bonded gap filling material in semiconductor manufacturing | Bo-Jiun Lin, Ching-Yu Chang, Hai-Ching Chen | 2020-12-15 |
| 10867958 | Integrated circuit with a thermally conductive underfill | Chen-Hua Yu | 2020-12-15 |
| 10868143 | Spacers with rectangular profile and methods of forming the same | Yu-Sheng Chang, Chung-Ju Lee | 2020-12-15 |
| 10867906 | Conductive structures in semiconductor devices | Tai-I Yang, Yu-Chieh Liao, Tien-Lu Lin | 2020-12-15 |
| 10867913 | Method and apparatus for forming self-aligned via with selectively deposited etching stop layer | Yung-Hsu Wu, Hai-Ching Chen, Jung-Hsun Tsai, Shau-Lin Shue | 2020-12-15 |
| 10861742 | Interconnect structure having an etch stop layer over conductive lines | Cheng-Hsiung Tsai, Chung-Ju Lee, Shau-Lin Shue | 2020-12-08 |
| 10854458 | Method and structure for semiconductor device having gate spacer protection layer | Chih Wei Lu, Chung-Ju Lee, Hai-Ching Chen, Chien-Hua Huang | 2020-12-01 |
| 10847634 | Field effect transistor and method of forming the same | Te-En Cheng, Chun Te Li, Kai-Hsuan Lee, Wei-Ken Lin | 2020-11-24 |
| 10840154 | Method for forming semiconductor structure with high aspect ratio | Han-Pin Chung, Chih-Tang Peng | 2020-11-17 |
| 10833170 | Low-k gate spacer and methods for forming the same | Wen-Kai Lin, Bo-Yu Lai, Li Chun Te, Kai-Hsuan Lee, Sai-Hooi Yeong +1 more | 2020-11-10 |
| 10818600 | Structure and method for a low-k dielectric with pillar-type air-gaps | Chih Wei Lu, Chung-Ju Lee | 2020-10-27 |
| 10818596 | Method for forming semiconductor device structure with graphene layer | Tai-I Yang, Tien-Lu Lin, Wei-Chen Chu | 2020-10-27 |
| 10784160 | Semiconductor device having voids and method of forming same | Yung-Hsu Wu, Chien-Hua Huang, Chung-Ju Lee, Shau-Lin Shue | 2020-09-22 |