Issued Patents All Time
Showing 1–25 of 45 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12424438 | Low-k dielectric and processes for forming same | Chia-Cheng Chou, Li Chun Te, Tien-I Bao | 2025-09-23 |
| 12417948 | Hybrid film scheme for self-aligned contact | Jian Lu, Tsai-Jung Ho, Bor Chiuan Hsieh, Tze-Liang Lee | 2025-09-16 |
| 12387974 | Patterning interconnects and other structures by photo-sensitizing method | Wei-Jen Lo, Syun-Ming Jang, Tze-Liang Lee | 2025-08-12 |
| 12322647 | Semiconductor devices and methods | Yu-Kai Lin, Jr-Hung Li, Tze-Liang Lee | 2025-06-03 |
| 12302595 | Dummy hybrid film for self-alignment contact formation | Bor Chiuan Hsieh, Tsai-Jung Ho, Tze-Liang Lee | 2025-05-13 |
| 12198979 | Semiconductor device with multi-layer etch stop structure | Tze-Liang Lee, Jen Hung Wang, Yu-Kai Lin, Su-Jen Sung | 2025-01-14 |
| 12166128 | Multi-layer film device and method | Yao-Jen Chang, Chih-Chien Chi, Chen-Yuan Kao, Hung-Wen Su, Kai-Shiang Kuo +1 more | 2024-12-10 |
| 12148696 | Methods for reducing dual damascene distortion | Chao-Chun Wang, Chung-Chi Ko | 2024-11-19 |
| 12062613 | Semiconductor device having an extra low-k dielectric layer and method of forming the same | Chia-Cheng Chou, Chun Te Li | 2024-08-13 |
| 12033890 | Patterning interconnects and other structures by photo-sensitizing method | Wei-Jen Lo, Syun-Ming Jang, Tze-Liang Lee | 2024-07-09 |
| 11848231 | Method for forming semiconductor device with multi-layer etch stop structure | Tze-Liang Lee, Jen Hung Wang, Yu-Kai Lin, Su-Jen Sung | 2023-12-19 |
| 11777035 | Multi-layer film device and method | Yao-Jen Chang, Chih-Chien Chi, Chen-Yuan Kao, Hung-Wen Su, Kai-Shiang Kuo +1 more | 2023-10-03 |
| 11676855 | Patterning interconnects and other structures by photo-sensitizing method | Wei-Jen Lo, Syun-Ming Jang, Tze-Liang Lee | 2023-06-13 |
| 11482493 | Methods for reducing dual damascene distortion | Chao-Chun Wang, Chung-Chi Ko | 2022-10-25 |
| 11417602 | Semiconductor device having an extra low-k dielectric layer and method of forming the same | Chia-Cheng Chou, Li Chun Te | 2022-08-16 |
| 11374127 | Multi-layer film device and method | Yao-Jen Chang, Chih-Chien Chi, Chen-Yuan Kao, Hung-Wen Su, Kai-Shiang Kuo +1 more | 2022-06-28 |
| 11328952 | Interconnect structure and method | Chia-Cheng Chou, Chih-Chien Chi, Chung-Chi Ko, Yao-Jen Chang, Chen-Yuan Kao +3 more | 2022-05-10 |
| 11282742 | Semiconductor device with multi-layer etch stop structure and method for forming the same | Tze-Liang Lee, Jen Hung Wang, Yu-Kai Lin, Su-Jen Sung | 2022-03-22 |
| 11062901 | Low-k dielectric and processes for forming same | Chia-Cheng Chou, Li Chun Te, Tien-I Bao | 2021-07-13 |
| 10910216 | Low-k dielectric and processes for forming same | Chia-Cheng Chou, Li Chun Te, Tien-I Bao | 2021-02-02 |
| 10840134 | Interconnect structure and method | Chia-Cheng Chou, Chih-Chien Chi, Chung-Chi Ko, Yao-Jen Chang, Chen-Yuan Kao +3 more | 2020-11-17 |
| 10818598 | Methods for reducing dual damascene distortion | Chao-Chun Wang, Chung-Chi Ko | 2020-10-27 |
| 10727350 | Multi-layer film device and method | Yao-Jen Chang, Chih-Chien Chi, Chen-Yuan Kao, Hung-Wen Su, Kai-Shiang Kuo +1 more | 2020-07-28 |
| 10707165 | Semiconductor device having an extra low-k dielectric layer and method of forming the same | Chia-Cheng Chou, Li Chun Te | 2020-07-07 |
| 10332836 | Methods for reducing dual damascene distortion | Chao-Chun Wang, Chung-Chi Ko | 2019-06-25 |