Issued Patents All Time
Showing 51–75 of 89 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11024602 | Hybrid bond pad structure | Sin-Yao Huang, Chun-Chieh Chuang, Ching-Chun Wang, Dun-Nian Yaung, Feng-Chi Hung +1 more | 2021-06-01 |
| 11011600 | Semiconductor structure having integrated inductor therein | Ming-Che Lee, I-Nan Chen, Cheng-Hsien Chou, Cheng-Yuan Tsai | 2021-05-18 |
| 11011568 | Semiconductor structure, back-side illuminated image sensor and method for manufacturing the same | Cheng-Hsien Chou, Min-Feng Kao | 2021-05-18 |
| 10978345 | Interconnect structure for stacked device | Shu-Ting Tsai, Jeng-Shyan Lin, Dun-Nian Yaung, Jen-Cheng Liu, Feng-Chi Hung +3 more | 2021-04-13 |
| 10964746 | Deep trench isolation shrinkage method for enhanced device performance | Cheng-Hsien Chou, Shih Pei Chou, Chih-Yu Lai, Chih-Ta Chen, Yeur-Luen Tu +1 more | 2021-03-30 |
| 10857651 | Apparatus of chemical mechanical polishing and operating method thereof | Chun-Kai Lan, Tung-He Chou, Ming-Tung Wu, Hsun-Chung Kuang | 2020-12-08 |
| 10727077 | Structure and method to expose memory cells with different sizes | Cheng-Tai Hsiao, Cheng-Yuan Tsai, Hsun-Chung Kuang, Yao-Wen Chang | 2020-07-28 |
| 10727097 | Mechanisms for cleaning substrate surface for hybrid bonding | Chih-Hui Huang, Yeur-Luen Tu, Cheng-Ta Wu, Chia-Shiung Tsai, Xiao-Meng Chen | 2020-07-28 |
| 10622401 | Semiconductor structure, back-side illuminated image sensor and method for manufacturing the same | Cheng-Hsien Chou, Min-Feng Kao | 2020-04-14 |
| 10541297 | Semiconductor structure having integrated inductor therein | Ming-Che Lee, I-Nan Chen, Cheng-Hsien Chou, Cheng-Yuan Tsai | 2020-01-21 |
| 10529913 | Techniques for MRAM MTJ top electrode connection | Cheng-Tai Hsiao, Cheng-Yuan Tsai, Hsun-Chung Kuang | 2020-01-07 |
| 10522514 | 3DIC structure and methods of forming | Kuo-Ming Wu, Yung-Lung Lin, Zhi-Yang Wang, Cheng-Hsien Chou | 2019-12-31 |
| 10522487 | Semiconductor structure and manufacturing method thereof | Shih Pei Chou, Ming-Che Lee, Kuo-Ming Wu, Cheng-Hsien Chou, Cheng-Yuan Tsai +1 more | 2019-12-31 |
| 10504756 | Wafer processing method and apparatus | Chih-Hui Huang, Chun-Han Tsao, Yeur-Luen Tu, Chia-Shiung Tsai, Xiaomeng Chen | 2019-12-10 |
| 10325956 | Deep trench isolation shrinkage method for enhanced device performance | Cheng-Hsien Chou, Shih Pei Chou, Chih-Yu Lai, Chih-Ta Chen, Yeur-Luen Tu +1 more | 2019-06-18 |
| 10283550 | Semiconductor structure, back-side illuminated image sensor and method for manufacturing the same | Cheng-Hsien Chou, Min-Feng Kao | 2019-05-07 |
| 10269770 | Hybrid bond pad structure | Sin-Yao Huang, Chun-Chieh Chuang, Ching-Chun Wang, Dun-Nian Yaung, Feng-Chi Hung +1 more | 2019-04-23 |
| 10177106 | Conductive pad structure for hybrid bonding and methods of forming same | Shih Pei Chou, Yen-Chang Chu, Cheng-Hsien Chou, Chih-Hui Huang, Yeur-Luen Tu | 2019-01-08 |
| 10163651 | Structure and method to expose memory cells with different sizes | Cheng-Tai Hsiao, Cheng-Yuan Tsai, Hsun-Chung Kuang, Yao-Wen Chang | 2018-12-25 |
| 10164001 | Semiconductor structure having integrated inductor therein | Ming-Che Lee, I-Nan Chen, Cheng-Hsien Chou, Cheng-Yuan Tsai | 2018-12-25 |
| 10096515 | Interconnect structure for stacked device | Shu-Ting Tsai, Jeng-Shyan Lin, Dun-Nian Yaung, Jen-Cheng Liu, Feng-Chi Hung +3 more | 2018-10-09 |
| 10074612 | Method for forming alignment marks and structure of same | Cheng-Hsien Chou, Chun-Wei Chang, Kai-Chun Hsu, Chih-Yu Lai, Wei-Cheng Hsu +7 more | 2018-09-11 |
| 10050018 | 3DIC structure and methods of forming | Kuo-Ming Wu, Yung-Lung Lin, Zhi-Yang Wang, Cheng-Hsien Chou | 2018-08-14 |
| 10043705 | Memory device and method of forming thereof | Yen-Chang Chu, Yao-Wen Chang, Alexander Kalnitsky | 2018-08-07 |
| 9960200 | Selective deposition and planarization for a CMOS image sensor | Sheng-Chan Li, Cheng-Hsien Chou, Cheng-Yuan Tsai, Chih-Hui Huang | 2018-05-01 |