HT

Hao-Yi Tsai

TSMC: 418 patents #11 of 12,232Top 1%
MV Mosel Vitelic: 1 patents #197 of 482Top 45%
PT Promos Technologies: 1 patents #115 of 311Top 40%
TC Taiwan Semiconductor Co.: 1 patents #22 of 44Top 50%
Overall (All Time): #556 of 4,157,543Top 1%
420
Patents All Time

Issued Patents All Time

Showing 401–420 of 420 patents

Patent #TitleCo-InventorsDate
8013333 Semiconductor test pad structures Hsien-Wei Chen, Ying-Ju Chen, Yu-Wen Liu, Shin-Puu Jeng 2011-09-06
7936067 Backend interconnect scheme with middle dielectric layer having improved strength Yu-Wen Liu, Hsien-Wei Chen, Ying-Ju Chen, Shin-Puu Jeng 2011-05-03
7906836 Heat spreader structures in scribe lines Hsien-Wei Chen, Yu-Wen Liu, Jyh-Cherng Sheu, Shin-Puu Jeng, Chen-Hua Yu +1 more 2011-03-15
7859092 Package structures Benson Liu, Hsien-Wei Chen, Shin-Puu Jeng 2010-12-28
7811866 Single passivation layer scheme for forming a fuse Shang-Yun Hou, Anbiarshy Wu, Chia-Lun Tsai, Shin-Puu Jeng 2010-10-12
7776627 Flexible structures for interconnect reliability test Shin-Puu Jeng, Shang-Yun Hou, Anbiarshy Wu 2010-08-17
7754601 Semiconductor interconnect air gap formation process Hsien-Wei Chen, Shin-Puu Jeng 2010-07-13
7732897 Methods of die sawing and structures formed thereby Shin-Puu Jeng 2010-06-08
7679384 Parametric testline with increased test pattern areas Hsien-Wei Chen, Shih-Hsun Hsu, Shin-Puu Jeng 2010-03-16
7651893 Metal electrical fuse structure Hsueh-Chung Chen, Hsien-Wei Chen, Shin-Puu Jeng, Shang-Yun Hou 2010-01-26
7553736 Increasing dielectric constant in local regions for the formation of capacitors Hsien-Wei Chen, Hsueh-Chung Chen 2009-06-30
7449785 Solder bump on a semiconductor substrate Shin-Puu Jeng, Shang-Yun Hou, Hsien-Wei Chen, Chia-Lun Tsai 2008-11-11
7446398 Bump pattern design for flip chip semiconductor package Pao-Kang Niu, Pei-Haw Tsao, Yung Kuan Hsiao, Chung Yu Wang, Shang-Yun Hou +1 more 2008-11-04
7397106 Laser fuse with efficient heat dissipation Chao-Hsiang Yang, Shang-Yun Hou, Chia-Lun Tsai, Shin-Puu Jeng 2008-07-08
7364998 Method for forming high reliability bump structure Sung-Cheng Chiu, Hsiu-Mei Yu, Shih-Ming Chen, Shang-Yun Hou 2008-04-29
7294937 Apparatus and method for manufacturing a semiconductor wafer with reduced delamination and peeling Chao-Yuan Su, Pei-Haw Tsao, Hsin-Hui Lee, Chender Huang, Shang Y. Hou +2 more 2007-11-13
7235424 Method and apparatus for enhanced CMP planarization using surrounded dummy design Hsien-Wei Chen, Hsueh-Chung Chen, Shin-Puu Jeng, Jian-Hong Lin, Chih-Tao Lin +1 more 2007-06-26
7148089 Method for forming copper fuse links Meng-Chi Hung, Shang-Yong Hou 2006-12-12
7126225 Apparatus and method for manufacturing a semiconductor wafer with reduced delamination and peeling Chao-Yuan Su, Pei-Haw Tsao, Hsin-Hui Lee, Chender Huang, Shang Y. Hou +2 more 2006-10-24
6624073 Optimized TaCN thin film diffusion barrier for copper metallization Shi-Chung Sun 2003-09-23