Issued Patents All Time
Showing 1–19 of 19 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12148677 | Semiconductor device and method of forming ultra high density embedded semiconductor die package | See Chian Lim, Teck Tiong Tan, Ching Meng Fang, Yoke Hor Phua, Bartholomew Liao | 2024-11-19 |
| 11227809 | Semiconductor device and method of forming ultra high density embedded semiconductor die package | See Chian Lim, Teck Tiong Tan, Ching Meng Fang, Yoke Hor Phua, Bartholomew Liao | 2022-01-18 |
| 10916482 | Semiconductor device and method of forming reconstituted wafer with larger carrier to achieve more EWLB packages per wafer with encapsulant deposited under temperature and pressure | Yoke Hor Phua | 2021-02-09 |
| 9824923 | Semiconductor device and method of forming conductive pillar having an expanded base | Dzafir Bin Mohd Shariff, Kwong Loon Yam, Lai Yee Chia | 2017-11-21 |
| 9627338 | Semiconductor device and method of forming ultra high density embedded semiconductor die package | See Chian Lim, Teck Tiong Tan, Ching Meng Fang, Yoke Hor Phua, Bartholomew Liao | 2017-04-18 |
| 9236278 | Integrated circuit packaging system with a substrate embedded dummy-die paddle and method of manufacture thereof | Rui Huang, Xusheng Bao, Kang Chen, Hin Hwa Goh | 2016-01-12 |
| 8766426 | Integrated circuit packaging system with warpage control and method of manufacture thereof | Hin Hwa Goh, Xusheng Bao, Kang Chen, Rui Huang | 2014-07-01 |
| 8524577 | Semiconductor device and method of forming reconstituted wafer with larger carrier to achieve more eWLB packages per wafer with encapsulant deposited under temperature and pressure | Yoke Hor Phua | 2013-09-03 |
| 8513098 | Semiconductor device and method of forming reconstituted wafer with larger carrier to achieve more eWLB packages per wafer with encapsulant deposited under temperature and pressure | Yoke Hor Phua | 2013-08-20 |
| 8455991 | Integrated circuit packaging system with warpage control and method of manufacture thereof | Xusheng Bao, Kang Chen, Hin Hwa Goh, Rui Huang | 2013-06-04 |
| 8421212 | Integrated circuit packaging system with active surface heat removal and method of manufacture thereof | Kang Chen, Xusheng Bao, Rui Huang, Hin Hwa Goh | 2013-04-16 |
| 7446398 | Bump pattern design for flip chip semiconductor package | Pao-Kang Niu, Pei-Haw Tsao, Hao-Yi Tsai, Chung Yu Wang, Shang-Yun Hou +1 more | 2008-11-04 |
| 6444584 | Plasma etch method for forming composite silicon/dielectric/silicon stack layer | — | 2002-09-03 |
| 6140218 | Method for fabricating a T-shaped hard mask/conductor profile to improve self-aligned contact isolation | Jen-Cheng Liu, Li-Chih Chao, Huan-Just Lin | 2000-10-31 |
| 6107155 | Method for making a more reliable storage capacitor for dynamic random access memory (DRAM) | Cheng-Ming Wu, Yu-Hua Lee | 2000-08-22 |
| 6077778 | Method of improving refresh time in DRAM products | Min-Hsiung Chiang, Yuan-Chang Huang | 2000-06-20 |
| 6030879 | Method of reducing particles during the manufacturing of fin or cylinder capacitors on a wafer | Yuan-Chang Huang, Dah Jong Ou Yang | 2000-02-29 |
| 6004857 | Method to increase DRAM capacitor via rough surface storage node plate | Chen-Jong Wang | 1999-12-21 |
| 5985765 | Method for reducing bonding pad loss using a capping layer when etching bonding pad passivation openings | Cheng-Ming Wu, Yu-Hua Lee | 1999-11-16 |