CS

Chao-Yuan Su

TSMC: 30 patents #1,141 of 12,232Top 10%
UM United Microelectronics: 2 patents #1,942 of 4,560Top 45%
📍 Baoshan, TW: #67 of 3,661 inventorsTop 2%
Overall (All Time): #113,607 of 4,157,543Top 3%
32
Patents All Time

Issued Patents All Time

Showing 1–25 of 32 patents

Patent #TitleCo-InventorsDate
9691749 Exclusion zone for stress-sensitive circuit design Chung-Yi Lin 2017-06-27
8829653 Exclusion zone for stress-sensitive circuit design Chung-Yi Lin 2014-09-09
8629563 Method for packaging semiconductor dies having through-silicon vias 2014-01-14
8624346 Exclusion zone for stress-sensitive circuit design Chung-Yi Lin 2014-01-07
8497584 Method to improve bump reliability for flip chip device Yen-Ming Chen, Chia-Fu Lin, Shun-Liang Hsu, Kai-Ming Ching, Hsin-Hui Lee +1 more 2013-07-30
8124458 Method for packaging semiconductor dies having through-silicon vias 2012-02-28
7906425 Fluxless bumping process Chia-Fu Lin, Hsin-Hui Lee, Yen-Ming Chen, Kai-Ming Ching, Li-Chih Chen +2 more 2011-03-15
7892962 Nail-shaped pillar for wafer-level chip-scale packaging 2011-02-22
7825517 Method for packaging semiconductor dies having through-silicon vias 2010-11-02
7719076 High-voltage MOS transistor device Shih-Ming Shu, Chih-Jen Huang, Tun-Jen Cheng 2010-05-18
7709908 High-voltage MOS transistor device Wei-Lun Hsu, Ching-Ming Lee, Chih-Jen Huang, Te-Yuan Wu, Chun-Hsiung Peng 2010-05-04
7468321 Application of impressed-current cathodic protection to prevent metal corrosion and oxidation Kai-Ming Ching, Chia-Fu Lin, Wen-Hsiang Tseng, Ta-Min Lin, Yen-Ming Chen +1 more 2008-12-23
7294937 Apparatus and method for manufacturing a semiconductor wafer with reduced delamination and peeling Pei-Haw Tsao, Hsin-Hui Lee, Chender Huang, Shang Y. Hou, Shin-Puu Jeng +2 more 2007-11-13
7276454 Application of impressed-current cathodic protection to prevent metal corrosion and oxidation Kai-Ming Ching, Chia-Fu Lin, Wen-Hsiang Tseng, Ta-Min Lin, Yen-Ming Chen +2 more 2007-10-02
7256071 Underfilling efficiency by modifying the substrate design of flip chips Hsin-Hui Lee 2007-08-14
7157734 Semiconductor bond pad structures and methods of manufacturing thereof Pei-Haw Tsao, Chender Huang, Shang Y. Hou, Chia-Hsiung Hsu 2007-01-02
7154185 Encapsulation method for SBGA Hsin-Hui Lee, Pei-Hwa Tsao 2006-12-26
7134199 Fluxless bumping process Chia-Fu Lin, Hsin-Hui Lee, Yen-Ming Chen, Kai-Ming Ching, Li-Chih Chen +2 more 2006-11-14
7126225 Apparatus and method for manufacturing a semiconductor wafer with reduced delamination and peeling Pei-Haw Tsao, Hsin-Hui Lee, Chender Huang, Shang Y. Hou, Shin-Puu Jeng +2 more 2006-10-24
7105920 Substrate design to improve chip package reliability Chen-Der Huang, Pei-Haw Tsao, Chuen-Jye Lin 2006-09-12
7098082 Microelectronics package assembly tool and method of manufacture therewith Hsin-Hui Lee 2006-08-29
7075016 Underfilling efficiency by modifying the substrate design of flip chips Hsin-Hui Lee 2006-07-11
6974659 Method of forming a solder ball using a thermally stable resinous protective layer Chia-Fu Lin, Hsin-Hui Lee, Yen-Ming Chen, Kai-Ming Ching, Li-Chih Chen 2005-12-13
6821813 Process for bonding solder bumps to a substrate 2004-11-23
6805279 Fluxless bumping process using ions Hsin-Hui Lee, Chia-Fu Lin, Yeng-Ming Chen, Kai-Ming Chin, Li-Chi Chen +1 more 2004-10-19