Issued Patents All Time
Showing 1–16 of 16 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9369175 | Low fabrication cost, high performance, high reliability chip scale package | Jin-Yuan Lee, Ming-Ta Lei, Ching-Cheng Huang | 2016-06-14 |
| 8901733 | Reliable metal bumps on top of I/O pads after removal of test probe marks | Ching-Cheng Huang, Ming-Ta Lei, Mou-Shiung Lin | 2014-12-02 |
| 8685834 | Fabrication method of package structure with simplified encapsulation structure and simplified wiring | Pei-Haw Tsao, Chender Huang | 2014-04-01 |
| 8481418 | Low fabrication cost, high performance, high reliability chip scale package | Jin-Yuan Lee, Ming-Ta Lei, Ching-Cheng Huang | 2013-07-09 |
| 8178967 | Low fabrication cost, high performance, high reliability chip scale package | Jin-Yuan Lee, Ming-Ta Lei, Ching-Cheng Huang | 2012-05-15 |
| 8158508 | Structure and manufacturing method of a chip scale package | Mou-Shiung Lin, Ming-Ta Lei | 2012-04-17 |
| 7902679 | Structure and manufacturing method of a chip scale package with low fabrication cost, fine pitch and high reliability solder bump | Mou-Shiung Lin, Ming-Ta Lei | 2011-03-08 |
| 7638887 | Package structure and fabrication method thereof | Pei-Haw Tsao, Chender Huang | 2009-12-29 |
| 7465653 | Reliable metal bumps on top of I/O pads after removal of test probe marks | Ching-Cheng Huang, Ming-Ta Lei, Mou-Shiung Lin | 2008-12-16 |
| 7355288 | Low fabrication cost, high performance, high reliability chip scale package | Jin-Yuan Lee, Ming-Ta Lei, Ching-Cheng Huang | 2008-04-08 |
| 7338890 | Low fabrication cost, high performance, high reliability chip scale package | Jin-Yuan Lee, Ming-Ta Lei, Ching-Cheng Huang | 2008-03-04 |
| 7105920 | Substrate design to improve chip package reliability | Chao-Yuan Su, Chen-Der Huang, Pei-Haw Tsao | 2006-09-12 |
| 6917119 | Low fabrication cost, high performance, high reliability chip scale package | Jin-Yuan Lee, Ming-Ta Lei, Ching-Cheng Huang | 2005-07-12 |
| 6815324 | Reliable metal bumps on top of I/O pads after removal of test probe marks | Ching-Cheng Huang, Ming-Ta Lei, Mou-Shiung Lin | 2004-11-09 |
| 6642136 | Method of making a low fabrication cost, high performance, high reliability chip scale package | Jin-Yuan Lee, Ming-Ta Lei, Ching-Cheng Huang | 2003-11-04 |
| 6075281 | Modified lead finger for wire bonding | Kuang-Ho Liao, Tsung-Chieh Chen | 2000-06-13 |