Issued Patents All Time
Showing 26–50 of 104 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9773708 | Devices and methods of forming VFET with self-aligned replacement metal gates aligned to top spacer post top source drain EPI | John H. Zhang, Steven Bentley | 2017-09-26 |
| 9761662 | Active area shapes reducing device size | Bipul C. Paul | 2017-09-12 |
| 9711511 | Vertical channel transistor-based semiconductor memory structure | Ryan Ryoung-Han Kim, Motoi Ichihashi, Youngtag Woo, Deepak Nayak | 2017-07-18 |
| 9640636 | Methods of forming replacement gate structures and bottom and top source/drain regions on a vertical transistor device | Steven Bentley, John H. Zhang, Hiroaki Niimi | 2017-05-02 |
| 9640533 | Methods, apparatus and system for providing source-drain epitaxy layer with lateral over-growth suppression | Christopher M. Prindle | 2017-05-02 |
| 9543215 | Punch-through-stop after partial fin etch | Steven Bentley, Chanro Park | 2017-01-10 |
| 9536793 | Self-aligned gate-first VFETs using a gate spacer recess | John H. Zhang, Steven Bentley, Chanro Park | 2017-01-03 |
| 9530866 | Methods of forming vertical transistor devices with self-aligned top source/drain conductive contacts | John H. Zhang, Carl Radens, Steven Bentley, Brian Alexander Cohen | 2016-12-27 |
| 9530863 | Methods of forming vertical transistor devices with self-aligned replacement gate structures | John H. Zhang, Carl Radens, Steven Bentley, Brian Alexander Cohen | 2016-12-27 |
| 9508601 | Method to form silicide and contact at embedded epitaxial facet | James Walter Blatchford, Shashank S. Ekbote, Younsung Choi | 2016-11-29 |
| 9419131 | Semiconductor device having vertical channel transistor and method for fabricating the same | Min Gyu Sung, Yong-Soo Kim | 2016-08-16 |
| 9412616 | Methods of forming single and double diffusion breaks on integrated circuit products comprised of FinFET devices and the resulting products | Ruilong Xie, Min Gyu Sung, Ryan Ryoung-Han Kim | 2016-08-09 |
| 9406769 | Silicide formation due to improved SiGe faceting | Shashank S. Ekbote, Ebenezer E. Eshun, Youn Sung Choi | 2016-08-02 |
| 9362279 | Contact formation for semiconductor device | Ruilong Xie, Andy Wei, William J. Taylor, Jr., Ryan Ryoung-Han Kim, Chanro Park | 2016-06-07 |
| 9362181 | Methods of forming diffusion breaks on integrated circuit products comprised of FinFET devices and the resulting products | Ruilong Xie, Min Gyu Sung, Ryan Ryoung-Han Kim, Chanro Park | 2016-06-07 |
| 9324799 | FinFET structures having uniform channel size and methods of fabrication | Min Gyu Sung, Sukwon Hong | 2016-04-26 |
| 9263446 | Methods of forming replacement gate structures on transistor devices with a shared gate structure and the resulting products | Ruilong Xie, Min Gyu Sung, Chanro Park | 2016-02-16 |
| 9245975 | Recessed channel insulated-gate field effect transistor with self-aligned gate and increased channel length | Stanley Seungchul Song, Amitabh Jain | 2016-01-26 |
| 9240404 | Embedded polysilicon resistor in integrated circuits formed by a replacement gate process | Ki-Don Lee, Stanley Seungchul Song | 2016-01-19 |
| 9236452 | Raised source/drain EPI with suppressed lateral EPI overgrowth | Jody A. Fronheiser, Christopher M. Prindle | 2016-01-12 |
| 9236308 | Methods of fabricating fin structures of uniform height | Min Gyu Sung, Sukwon Hong | 2016-01-12 |
| 9202883 | Silicide formation due to improved SiGe faceting | Shashank S. Ekbote, Ebenezer E. Eshun, Youn Sung Choi | 2015-12-01 |
| 9178038 | Raised source/drain MOS transistor and method of forming the transistor with an implant spacer and an epitaxial spacer | Seung-Chul Song, James Walter Blatchford | 2015-11-03 |
| 9093298 | Silicide formation due to improved SiGe faceting | Shashank S. Ekbote, Ebenezer E. Eshun, Youn Sung Choi | 2015-07-28 |
| 9064854 | Semiconductor device with gate stack structure | Hong-Seon Yang, Heung-Jae Cho, Tae Kyung Kim, Yong-Soo Kim, Min Gyu Sung | 2015-06-23 |