PF

Philip A. Fisher

AM AMD: 29 patents #329 of 9,279Top 4%
NU Nurture: 3 patents #2 of 10Top 20%
Globalfoundries: 2 patents #1,397 of 4,424Top 35%
IBM: 1 patents #44,794 of 70,183Top 65%
Overall (All Time): #103,666 of 4,157,543Top 3%
34
Patents All Time

Issued Patents All Time

Showing 25 most recent of 34 patents

Patent #TitleCo-InventorsDate
8629535 Mask for forming integrated circuit Richard J. Huang, Scott A. Bell, Srikanteswara Dakshina-Murthy, Richard Nguyen, Cyrus E. Tabery +1 more 2014-01-14
8030709 Metal gate stack and semiconductor gate stack for CMOS devices Charlotte DeWan Adams, Bruce B. Doris, William K. Henson, Jeffrey W. Sleight 2011-10-04
7767508 Method for forming offset spacers for semiconductor device arrangements Laura A. Brown, Johannes Groschopf, Huicai Zhong 2010-08-03
7521304 Method for forming integrated circuit Richard J. Huang, Scott A. Bell, Srikanteswara Dakshina-Murthy, Richard Nguyen, Cyrus E. Tabery +1 more 2009-04-21
7268066 Method for semiconductor gate line dimension reduction Douglas J. Bonser, Marina V. Plat, Chih-Yuh Yang, Scott A. Bell, Srikanteswara Dakshina-Murthy +1 more 2007-09-11
7183169 Method and arrangement for reducing source/drain resistance with epitaxial growth Andrew Waite, Scott Luning 2007-02-27
7169711 Method of using carbon spacers for critical dimension (CD) reduction Christopher F. Lyons, Richard J. Huang, Cyrus E. Tabery 2007-01-30
7015124 Use of amorphous carbon for gate patterning Richard J. Huang, Cyrus E. Tabery 2006-03-21
6884733 Use of amorphous carbon hard mask for gate patterning to eliminate requirement of poly re-oxidation Srikanteswara Dakshina-Murthy, Scott A. Bell, David E. Brown 2005-04-26
6875664 Formation of amorphous carbon ARC stack having graded transition between amorphous carbon and ARC material Richard J. Huang, Srikanteswara Dakshina-Murthy, Cyrus E. Tabery, Lu You 2005-04-05
6849530 Method for semiconductor gate line dimension reduction Douglas J. Bonser, Marina V. Plat, Chih-Yuh Yang, Scott A. Bell, Srikanteswara Dakshina-Murthy +1 more 2005-02-01
6828259 Enhanced transistor gate using E-beam radiation Chih-Yuh Yang, Marina V. Plat, Russell R.A. Callahan, Ashok M. Khathuria 2004-12-07
6825114 Selective stress-inducing implant and resulting pattern distortion in amorphous carbon patterning Christopher F. Lyons, Srikanteswara Dakshina-Murthy 2004-11-30
6784073 Method of making semiconductor-on-insulator device with thermoelectric cooler 2004-08-31
6773998 Modified film stack and patterning strategy for stress compensation and prevention of pattern distortion in amorphous carbon gate patterning Marina V. Plat, Chih-Yuh Yang, Christopher F. Lyons, Scott A. Bell, Douglas J. Bonser +2 more 2004-08-10
6764949 Method for reducing pattern deformation and photoresist poisoning in semiconductor device fabrication Douglas J. Bonser, Marina V. Plat, Chih-Yuh Yang, Scott A. Bell, Darin A. Chan +6 more 2004-07-20
6764947 Method for reducing gate line deformation and reducing gate line widths in semiconductor devices Darin A. Chan, Douglas J. Bonser, Marina V. Plat, Marilyn I. Wright, Chih-Yuh Yang +2 more 2004-07-20
6756255 CMOS process with an integrated, high performance, silicide agglomeration fuse Ciby Thuruthiyil 2004-06-29
6747333 Method and apparatus for STI using passivation material for trench bottom liner Qi Xiang 2004-06-08
6723666 Method for reducing gate oxide surface irregularities William G. En 2004-04-20
6673684 Use of diamond as a hard mask material Richard J. Huang, Cyrus E. Tabery 2004-01-06
6674128 Semiconductor-on-insulator device with thermoelectric cooler on surface 2004-01-06
6664154 Method of using amorphous carbon film as a sacrificial layer in replacement gate integration processes Scott A. Bell, Srikanteswara Dakshina-Murthy, Cyrus E. Tabery 2003-12-16
6653202 Method of shallow trench isolation (STI) formation using amorphous carbon Richard J. Huang 2003-11-25
6624300 Method for concentrating beta-glucan film Richard C. Potter, Kirk Hash, John D. Neidt 2003-09-23