Issued Patents All Time
Showing 101–124 of 124 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6330967 | Process to produce a high temperature interconnection | Joseph M. Milewski | 2001-12-18 |
| 6293455 | Method for producing a reliable BGA solder joint interconnection | David V. Caletka, Kevin Knadle | 2001-09-25 |
| 6294828 | Semiconductor chip package | William Rena LaFontaine, Jr., Paul Mescher | 2001-09-25 |
| 6288559 | Semiconductor testing using electrically conductive adhesives | William E. Bernier, Michael A. Gaynes, Wayne J. Howell, Mark V. Pierson, Ajit K. Trivedi | 2001-09-11 |
| 6268739 | Method and device for semiconductor testing using electrically conductive adhesives | William E. Bernier, Michael A. Gaynes, Wayne J. Howell, Mark V. Pierson, Ajit K. Trivedi | 2001-07-31 |
| 6236115 | High density integrated circuit packaging with chip stacking and via interconnections | Michael A. Gaynes, Alan J. Emerick, Viswanadham Puligandla, Jerzy M. Zalesinski | 2001-05-22 |
| 6199751 | Polymer with transient liquid phase bondable particles | Michael A. Gaynes, Kostas Papathomas, Giana M. Phelan | 2001-03-13 |
| 6187678 | High density integrated circuit packaging with chip stacking and via interconnections | Michael A. Gaynes, Alan J. Emerick, Viswanadham Puligandla, Jerzy M. Zalesinski | 2001-02-13 |
| 6162660 | Method for joining a semiconductor chip to a chip carrier substrate and resulting chip package | William Rena LaFontaine, Jr., Paul Mescher | 2000-12-19 |
| 6138893 | Method for producing a reliable BGA solder joint interconnection | David V. Caletka, Kevin Knadle | 2000-10-31 |
| 6130476 | Semiconductor chip package having chip-to-carrier mechanical/electrical connection formed via solid state diffusion | William Rena LaFontaine, Jr., Paul Mescher | 2000-10-10 |
| 6087021 | Polymer with transient liquid phase bondable particles | Michael A. Gaynes, Kostas Papathomas, Giana M. Phelan | 2000-07-11 |
| 6010060 | Lead-free solder process | Amit K. Sarkhel | 2000-01-04 |
| 6002177 | High density integrated circuit packaging with chip stacking and via interconnections | Michael A. Gaynes, Alan J. Emerick, Viswanadham Puligandla, Jerzy M. Zalesinski | 1999-12-14 |
| 5973389 | Semiconductor chip carrier assembly | Thomas M. Culnane, Michael A. Gaynes, Ramesh R. Kodnani, Mark V. Pierson | 1999-10-26 |
| 5874043 | Lead-free, high tin ternary solder alloy of tin, silver, and indium | Amit K. Sarkhel | 1999-02-23 |
| 5730932 | Lead-free, tin-based multi-component solder alloys | Amit K. Sarkhel | 1998-03-24 |
| 5713508 | Stabilization of conductive adhesive by metallurgical bonding | Michael A. Gaynes, Kostas Papathomas, Giana M. Phelan | 1998-02-03 |
| 5542602 | Stabilization of conductive adhesive by metallurgical bonding | Michael A. Gaynes, Kostas Papathomas, Giana M. Phelan | 1996-08-06 |
| 5493775 | Pressure contact open-circuit detector | Vijay S. Darekar | 1996-02-27 |
| 5170931 | Method and apparatus for mounting a flexible film semiconductor chip carrier on a circuitized substrate | Kishor Desai, Nelson P. Franchak, Robert H. Katyl, Harold Kohn, Tamar A. Sholtes +1 more | 1992-12-15 |
| 5159535 | Method and apparatus for mounting a flexible film semiconductor chip carrier on a circuitized substrate | Kishor Desai, Nelson P. Franchak, Robert H. Katyl, Harold Kohn, Tamar A. Sholtes +1 more | 1992-10-27 |
| 5075965 | Low temperature controlled collapse chip attach process | Charles F. Carey, Kenneth Michael Fallon, Rochelle Ginsburg | 1991-12-31 |
| 5038996 | Bonding of metallic surfaces | James R. Wilcox | 1991-08-13 |