Issued Patents All Time
Showing 25 most recent of 30 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7703199 | Method to accommodate increase in volume expansion during solder reflow | Krishna Darbha, Donald W. Henderson, Lawrence P. Lehman, George H. Thiel | 2010-04-27 |
| 7499614 | Passive alignment of VCSELs to waveguides in opto-electronic cards and printed circuit boards | Eric A. Johnson | 2009-03-03 |
| 7348261 | Wafer scale thin film package | Seungbae Park, Sanjeev Sathe | 2008-03-25 |
| 7086147 | Method of accommodating in volume expansion during solder reflow | Krishna Darbha, Donald W. Henderson, Lawrence P. Lehman, George H. Thiel | 2006-08-08 |
| 6933619 | Electronic package and method of forming | Eric A. Johnson | 2005-08-23 |
| 6913948 | Partially captured oriented interconnections for BGA packages and a method of forming the interconnections | Eric A. Johnson | 2005-07-05 |
| 6905961 | Land grid array stiffener for use with flexible chip carriers | Krishna Darbha, William Infantolino, Eric A. Johnson | 2005-06-14 |
| 6774474 | Partially captured oriented interconnections for BGA packages and a method of forming the interconnections | Eric A. Johnson | 2004-08-10 |
| 6695623 | Enhanced electrical/mechanical connection for electronic devices | William L. Brodsky, Michael A. Gaynes, Voya R. Markovich | 2004-02-24 |
| 6686664 | Structure to accommodate increase in volume expansion during solder reflow | Krishna Darbha, Donald W. Henderson, Lawrence P. Lehman, George H. Thiel | 2004-02-03 |
| 6672500 | Method for producing a reliable solder joint interconnection | Kevin Knadle, Charles G. Woychik | 2004-01-06 |
| 6649833 | Negative volume expansion lead-free electrical connection | Krishna Darbha, Donald W. Henderson, Lawrence P. Lehman, George H. Thiel | 2003-11-18 |
| 6627998 | Wafer scale thin film package | Seungbae Park, Sanjeev Sathe | 2003-09-30 |
| 6603195 | Planarized plastic package modules for integrated circuits | James L. Carper, John P. Cincotta, Kibby B. Horsford, Gary H. Irish, John J. Lajza, Jr. +4 more | 2003-08-05 |
| 6595784 | Interposer member having apertures for relieving stress and increasing contact compliancy | William L. Brodsky | 2003-07-22 |
| 6541857 | Method of forming BGA interconnections having mixed solder profiles | Eric A. Johnson | 2003-04-01 |
| 6528892 | Land grid array stiffener use with flexible chip carriers | Krishna Darbha, William Infantolino, Eric A. Johnson | 2003-03-04 |
| 6507116 | Electronic package and method of forming | Eric A. Johnson | 2003-01-14 |
| 6433283 | Dual purpose ribbon cable | William L. Brodsky, William Infantolino | 2002-08-13 |
| 6410988 | Thermally enhanced and mechanically balanced flip chip package and method of forming | Jean Dery, Eric Duchesne, Michael A. Gaynes, Eric A. Johnson, Luis J. Matienzo +1 more | 2002-06-25 |
| 6333551 | Surface profiling in electronic packages for reducing thermally induced interfacial stresses | Eric A. Johnson | 2001-12-25 |
| 6293455 | Method for producing a reliable BGA solder joint interconnection | Kevin Knadle, Charles G. Woychik | 2001-09-25 |
| 6274474 | Method of forming BGA interconnections having mixed solder profiles | Eric A. Johnson | 2001-08-14 |
| 6268567 | Dual purpose ribbon cable | William L. Brodsky, William Infantolino | 2001-07-31 |
| 6138893 | Method for producing a reliable BGA solder joint interconnection | Kevin Knadle, Charles G. Woychik | 2000-10-31 |