KD

Krishna Darbha

IBM: 10 patents #10,888 of 70,183Top 20%
Microsoft: 7 patents #6,382 of 40,388Top 20%
Overall (All Time): #275,882 of 4,157,543Top 7%
17
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
9661770 Graphic formation via material ablation Mark Thomas McCormack, Raj N. Master, Michael J. Lane, Ralf Groene, James Alec Ishihara +1 more 2017-05-23
8253688 Multi-mode optical navigation David D. Bohn, Jim Marshall, Brian L. Hastings 2012-08-28
8132976 Reduced impact keyboard with cushioned keys Dan Odell, Richard E. Compton, Glen C. Larsen, Kurt Allen Jenkins 2012-03-13
7796883 Flexible circuit connection Paul Hornikx, Juscelino Okura, Jagtar Saroya 2010-09-14
7777722 Multi-mode optical navigation David D. Bohn, Jim Marshall, Brian L. Hastings 2010-08-17
7703199 Method to accommodate increase in volume expansion during solder reflow David V. Caletka, Donald W. Henderson, Lawrence P. Lehman, George H. Thiel 2010-04-27
7454977 Force measuring systems for digital pens and other products Glen C. Larsen, Michael Baseflug 2008-11-25
7233025 Electronic packaging for optical emitters and sensors Pavan Davuluri, Mario R. Cristancho 2007-06-19
7086147 Method of accommodating in volume expansion during solder reflow David V. Caletka, Donald W. Henderson, Lawrence P. Lehman, George H. Thiel 2006-08-08
6989607 Stress reduction in flip-chip PBGA packaging by utilizing segmented chips and/or chip carriers Miguel A. Jimarez, Matthew Reiss, Sanjeev Sathe, Charles G. Woychik 2006-01-24
6905961 Land grid array stiffener for use with flexible chip carriers David V. Caletka, William Infantolino, Eric A. Johnson 2005-06-14
6686664 Structure to accommodate increase in volume expansion during solder reflow David V. Caletka, Donald W. Henderson, Lawrence P. Lehman, George H. Thiel 2004-02-03
6649833 Negative volume expansion lead-free electrical connection David V. Caletka, Donald W. Henderson, Lawrence P. Lehman, George H. Thiel 2003-11-18
6639302 Stress reduction in flip-chip PBGA packaging by utilizing segmented chip carries Miguel A. Jimarez, Matthew Reiss, Sanjeev Sathe, Charles G. Woychik 2003-10-28
6631078 Electronic package with thermally conductive standoff David J. Alcoe, Varaprasad V. Calmidi, Sanjeev Sathe 2003-10-07
6622786 Heat sink structure with pyramidic and base-plate cut-outs Varaprasad V. Calmidi, Sanjeev Sathe, Jamil A. Wakil 2003-09-23
6528892 Land grid array stiffener use with flexible chip carriers David V. Caletka, William Infantolino, Eric A. Johnson 2003-03-04