Issued Patents All Time
Showing 226–250 of 360 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10236369 | Techniques for forming non-planar germanium quantum well devices | Ravi Pillarisetty, Jack T. Kavalieros, Uday Shah, Benjamin Chu-Kung, Marko Radosavljevic +4 more | 2019-03-19 |
| 10229997 | Indium-rich NMOS transistor channels | Chandra S. Mohapatra, Anand S. Murthy, Glenn A. Glass, Tahir Ghani, Jack T. Kavalieros +3 more | 2019-03-12 |
| 10224399 | Strain compensation in transistors | Van H. Le, Benjamin Chu-Kung, Harold Hal W. Kennel, Ravi Pillarisetty, Jack T. Kavalieros | 2019-03-05 |
| 10211208 | High-mobility semiconductor source/drain spacer | Gilbert Dewey, Matthew V. Metz, Anand S. Murthy, Tahir Ghani, Chandra S. Mohapatra +2 more | 2019-02-19 |
| 10186580 | Semiconductor device having germanium active layer with underlying diffusion barrier layer | Van H. Le, Ravi Pillarisetty, Jack T. Kavalieros, Robert S. Chau, Harold W. Kennel | 2019-01-22 |
| 10177249 | Techniques for forming contacts to quantum well transistors | Ravi Pillarisetty, Benjamin Chu-Kung, Mantu K. Hudait, Marko Radosavljevic, Jack T. Kavalieros +2 more | 2019-01-08 |
| 10153372 | High mobility strained channels for fin-based NMOS transistors | Stephen M. Cea, Roza Kotlyar, Harold W. Kennel, Glenn A. Glass, Anand S. Murthy +1 more | 2018-12-11 |
| 10121856 | Integration methods to fabricate internal spacers for nanowire devices | Seiyon Kim, Kelin J. Kuhn, Tahir Ghani, Anand S. Murthy, Mark Armstrong +2 more | 2018-11-06 |
| 10121861 | Nanowire transistor fabrication with hardmask layers | Seung Hoon Sung, Seiyon Kim, Kelin J. Kuhn, Jack T. Kavalieros | 2018-11-06 |
| 10103263 | Strained channel region transistors employing source and drain stressors and systems including the same | Van H. Le, Harold W. Kennel, Ravi Pillarisetty, Jack T. Kavalieros, Niloy Mukherjee | 2018-10-16 |
| 10096709 | Aspect ratio trapping (ART) for fabricating vertical semiconductor devices | Van H. Le, Benjamin Chu-Kung, Gilbert Dewey, Jack T. Kavalieros, Ravi Pillarisetty +4 more | 2018-10-09 |
| 10084043 | High mobility nanowire fin channel on silicon substrate formed using sacrificial sub-fin | Gilbert Dewey, Matthew V. Metz, Jack T. Kavalieros, Tahir Ghani, Anand S. Murthy +4 more | 2018-09-25 |
| 10038054 | Variable gate width for gate all-around transistors | Van H. Le, Ravi Pillarisetty, Jack T. Kavalieros, Robert S. Chau, Seung Hoon Sung | 2018-07-31 |
| 10026845 | Deep gate-all-around semiconductor device having germanium or group III-V active layer | Ravi Pillarisetty, Van H. Le, Seung Hoon Sung, Jessica S. Kachian, Jack T. Kavalieros +5 more | 2018-07-17 |
| 10020371 | Contact techniques and configurations for reducing parasitic resistance in nanowire transistors | Ravi Pillarisetty, Benjamin Chu-Kung, Van H. Le, Gilbert Dewey, Niloy Mukherjee +3 more | 2018-07-10 |
| 10008565 | Semiconductor devices with germanium-rich active layers and doped transition layers | Van H. Le, Ravi Pillarisetty, Jessica S. Kachian, Marc C. French, Aaron A. Budrevich | 2018-06-26 |
| 9972686 | Germanium tin channel transistors | Ravi Pillarisetty, Van H. Le, Roza Kotlyar, Marko Radosavljevic, Han Wui Then +4 more | 2018-05-15 |
| 9929273 | Apparatus and methods of forming fin structures with asymmetric profile | Matthew V. Metz, Chandra S. Mohapatra, Gilbert Dewey, Nadia M. Rahhal-Orabi, Tahir Ghani +3 more | 2018-03-27 |
| 9911807 | Strain compensation in transistors | Van H. Le, Benjamin Chu-Kung, Harold Hal W. Kennel, Ravi Pillarisetty, Jack T. Kavalieros | 2018-03-06 |
| 9905651 | GE and III-V channel semiconductor devices having maximized compliance and free surface relaxation | Ravi Pillarisetty, Sansaptak Dasgupta, Niti Goel, Van H. Le, Marko Radosavljevic +8 more | 2018-02-27 |
| 9899505 | Conductivity improvements for III-V semiconductor devices | Marko Radosavljevic, Prashant Majhi, Jack T. Kavalieros, Niti Goel, Wilman Tsai +3 more | 2018-02-20 |
| 9876014 | Germanium-based quantum well devices | Ravi Pillarisetty, Been-Yih Jin, Benjamin Chu-Kung, Matthew V. Metz, Jack T. Kavalieros +5 more | 2018-01-23 |
| 9865684 | Nanoscale structure with epitaxial film having a recessed bottom portion | Benjamin Chu-Kung, Van H. Le, Robert S. Chau, Sansaptak Dasgupta, Gilbert Dewey +8 more | 2018-01-09 |
| 9859368 | Integration methods to fabricate internal spacers for nanowire devices | Seiyon Kim, Kelin J. Kuhn, Tahir Ghani, Anand S. Murthy, Mark Armstrong +2 more | 2018-01-02 |
| 9859278 | Bi-axial tensile strained GE channel for CMOS | Prashant Majhi, Niloy Mukherjee, Ravi Pillarisetty, Robert S. Chau | 2018-01-02 |