Issued Patents All Time
Showing 26–50 of 56 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7528051 | Method of inducing stresses in the channel region of a transistor | Zheng Yuan, Ellie Yieh, Shankar Venkataraman, Nitin K. Ingle | 2009-05-05 |
| 7427538 | Semiconductor on insulator apparatus and method | Been-Yih Jin, Robert S. Chau | 2008-09-23 |
| 7323391 | Substrate having silicon germanium material and stressed silicon nitride layer | — | 2008-01-29 |
| 7253123 | Method for producing gate stack sidewall spacers | Michael Kwan, Li-Qun Xia, Kang Sub Yim | 2007-08-07 |
| 7166505 | Method for making a semiconductor device having a high-k gate dielectric | Robert S. Chau, Mark L. Doczy | 2007-01-23 |
| 7141483 | Nitrous oxide anneal of TEOS/ozone CVD for improved gapfill | Zheng Yuan, Shankar Venkataraman | 2006-11-28 |
| 7087497 | Low-thermal-budget gapfill process | Zheng Yuan, Ellie Yieh, Shankar Venkataraman | 2006-08-08 |
| 7049200 | Method for forming a low thermal budget spacer | Ken MacWilliams, Hichem M'Saad | 2006-05-23 |
| 7045073 | Pre-etch implantation damage for the removal of thin film layers | Scott A. Hareland, Nick Lindert, Robert S. Chau | 2006-05-16 |
| 7018941 | Post treatment of low k dielectric films | Zhenjiang Cui, Josephine Chang, Alexandros T. Demos, Derek R. Witty, Helen R. Armer +2 more | 2006-03-28 |
| 6900481 | Non-silicon semiconductor and high-k gate dielectric metal oxide semiconductor field effect transistors | Been-Yih Jin, Robert S. Chau | 2005-05-31 |
| 6809017 | Interfacial layer for gate electrode and high-k dielectric layer and methods of fabrication | Robert S. Chau, Mark L. Doczy, Brian Roberds | 2004-10-26 |
| 6713358 | Method for making a semiconductor device having a high-k gate dielectric | Robert S. Chau, Timothy E. Glassman, Christopher Parker, Matthew V. Metz, Lawrence Foley +1 more | 2004-03-30 |
| 6707120 | Field effect transistor | Payman Aminzadeh, Peter K. Moon | 2004-03-16 |
| 6667251 | Plasma nitridation for reduced leakage gate dielectric layers | Robert McFadden, Jack T. Kavalieros, Doug Barlage, Robert S. Chau | 2003-12-23 |
| 6667232 | Thin dielectric layers and non-thermal formation thereof | Steven J. Keating, Robert S. Chau, Jack T. Kavalieros, Douglas Barlage | 2003-12-23 |
| 6620713 | Interfacial layer for gate electrode and high-k dielectric layer and methods of fabrication | Robert S. Chau, Mark L. Doczy, Brian Roberds | 2003-09-16 |
| 6617209 | Method for making a semiconductor device having a high-k gate dielectric | Robert S. Chau, Mark L. Doczy | 2003-09-09 |
| 6617210 | Method for making a semiconductor device having a high-k gate dielectric | Robert S. Chau | 2003-09-09 |
| 6610615 | Plasma nitridation for reduced leakage gate dielectric layers | Robert McFadden, Jack T. Kavalieros, Doug Barlage, Robert S. Chau | 2003-08-26 |
| 6597046 | Integrated circuit with multiple gate dielectric structures | Robert S. Chau, Bruce Beattie | 2003-07-22 |
| 6566727 | N2O nitrided-oxide trench sidewalls to prevent boron outdiffusion and decrease stress | Robert S. Chau, Simon Shi-Ning Yang, John Graham | 2003-05-20 |
| 6514879 | Method and apparatus for dry/catalytic-wet steam oxidation of silicon | Robert S. Chau, Ron Dalesky | 2003-02-04 |
| 6261925 | N2O Nitrided-oxide trench sidewalls to prevent boron outdiffusion and decrease stress | Robert S. Chau, Simon Shi-Ning Yang, John Graham | 2001-07-17 |
| 6221789 | Thin oxides of silicon | Robert S. Chau | 2001-04-24 |