Brian Roberds — 31 Patents at Intel

Brian Roberds has been granted 31 US patents while listed as an inventor at Intel. The first was granted in 1996 and the most recent in May 2024. Brian Roberds ranks #115,823 of 4,157,543 US inventors in our database (top 2.8%). Patent records list Brian Roberds in West Sacramento, CA, US.

Issued Patents All Time

Showing 1–25 of 31 patents

Patent #	Title	Co-Inventors	Date	Approx Value ⓘ
11982883	Optical device having phase change material and associated methods	Maria I. Mitkova-Vassileva, Al-Amin Ahmed Simon	2024-05-14
11803011	Optical switch having latched switch states and associated methods	Edward W. Miles	2023-10-31
7615465	Creation of high mobility channels in thin-body SOI devices	Brian S. Doyle	2009-11-10	$23,460,000
7485541	Creation of high mobility channels in thin-body SOI devices	Brian S. Doyle	2009-02-03	$17,091,000
7067386	Creation of high mobility channels in thin-body SOI devices	Brian S. Doyle	2006-06-27	$17,073,000
6952040	Transistor structure and method of fabrication	Robert S. Chau, Jack T. Kavalieros, Anand S. Murthy, Brian S. Doyle	2005-10-04	$23,554,000
6908832	In situ plasma wafer bonding method	Sharon N. Farrens	2005-06-21
6873013	Silicon-on-insulator structure and method of reducing backside drain-induced barrier lowering	Doulgas Barlage	2005-03-29	$48,968,000
6815310	Technique to obtain high mobility channels in MOS transistors by forming a strain layer on an underside of a channel	Brian S. Doyle	2004-11-09	$39,644,000
6809017	Interfacial layer for gate electrode and high-k dielectric layer and methods of fabrication	Reza Arghavani, Robert S. Chau, Mark L. Doczy	2004-10-26	$32,891,000
6740913	MOS transistor using mechanical stress to control short channel effects	Brian S. Doyle	2004-05-25	$32,256,000
6717213	Creation of high mobility channels in thin-body SOI devices	Brian S. Doyle	2004-04-06	$23,009,000
6656822	Method for reduced capacitance interconnect system using gaseous implants into the ILD	Brian S. Doyle, Sandy Lee, Quat Vu	2003-12-02	$54,763,000
6653700	Transistor structure and method of fabrication	Robert S. Chau, Jack T. Kavalieros, Anand S. Murthy, Brian S. Doyle	2003-11-25	$50,228,000
6645828	In situ plasma wafer bonding method	Sharon N. Farrens	2003-11-11
6642133	Silicon-on-insulator structure and method of reducing backside drain-induced barrier lowering	Doulgas Barlage	2003-11-04	$42,713,000
6638835	Method for bonding and debonding films using a high-temperature polymer	Cindy Colinge, Brian S. Doyle	2003-10-28	$51,726,000
6620713	Interfacial layer for gate electrode and high-k dielectric layer and methods of fabrication	Reza Arghavani, Robert S. Chau, Mark L. Doczy	2003-09-16	$36,866,000
6605498	Semiconductor transistor having a backfilled channel material	Anand S. Murthy, Brian S. Doyle	2003-08-12	$56,289,000
6563152	Technique to obtain high mobility channels in MOS transistors by forming a strain layer on an underside of a channel	Brian S. Doyle	2003-05-13	$40,032,000
6518109	Technique to produce isolated junctions by forming an insulation layer	—	2003-02-11	$38,289,000
6489655	Integrated circuit with dynamic threshold voltage	Brian S. Doyle, Rafael Rios	2002-12-03	$79,622,000
6399973	Technique to produce isolated junctions by forming an insulation layer	—	2002-06-04	$75,138,000
6362078	Dynamic threshold voltage device and methods for fabricating dynamic threshold voltage devices	Brian S. Doyle, Chunlin Liang	2002-03-26	$63,938,000
6362082	Methodology for control of short channel effects in MOS transistors	Brian S. Doyle	2002-03-26	$63,938,000

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Brian Roberds — 31 Patents

Issued Patents All Time

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