Issued Patents All Time
Showing 51–75 of 75 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9911694 | Method of forming high density, high shorting margin, and low capacitance interconnects by alternating recessed trenches | Jasmeet S. Chawla | 2018-03-06 |
| 9887161 | Techniques for forming interconnects in porous dielectric materials | David J. Michalak, Kanwal Jit Singh, Alan M. Myers | 2018-02-06 |
| 9736936 | Electronic fabric with incorporated chip and interconnect | Ravi Pillarisetty, Brian S. Doyle | 2017-08-15 |
| 9691716 | Techniques for enhancing fracture resistance of interconnects | Mauro J. Kobrinsky, Daniel Pantuso, Siddharth B. Bhingarde, Michael P. O'Day | 2017-06-27 |
| 9659869 | Forming barrier walls, capping, or alloys /compounds within metal lines | Alan M Meyers, Kanwal Jit Singh, Tejaswi K. Indukuri, James S. Clarke, Florian Gstrein | 2017-05-23 |
| 9514983 | Cobalt based interconnects and methods of fabrication thereof | James S. Clarke, Tejaswi K. Indukuri, Florian Gstrein, Daniel J. Zierath | 2016-12-06 |
| 9490313 | Vertical meander inductor for small core voltage regulators | Kevin P. O'Brien | 2016-11-08 |
| 9406615 | Techniques for forming interconnects in porous dielectric materials | David J. Michalak, Kanwal Jit Singh, Alan M. Myers | 2016-08-02 |
| 9385085 | Interconnects with fully clad lines | Manish Chandhok, Hui Jae Yoo, Ramanan V. Chebiam, Colin T. Carver | 2016-07-05 |
| 9385082 | Method of forming high density, high shorting margin, and low capacitance interconnects by alternating recessed trenches | Jasmeet S. Chawla | 2016-07-05 |
| 9379010 | Methods for forming interconnect layers having tight pitch interconnect structures | Jasmeet S. Chawla, Kanwal Jit Singh, Alan M. Myers, Elliot N. Tan, Richard E. Schenker | 2016-06-28 |
| 9374509 | Wearable imaging sensor for communications | Ravi Pillarisetty, Sairam Agraharam, John S. Guzek | 2016-06-21 |
| 9343411 | Techniques for enhancing fracture resistance of interconnects | Mauro J. Kobrinsky, Daniel Pantuso, Siddharth B. Bhingarde, Michael P. O'Day | 2016-05-17 |
| 9258114 | Quantum key distribution (QSD) scheme using photonic integrated circuit (PIC) | Kelin J. Kuhn, Marko Radosavljevic | 2016-02-09 |
| 9253884 | Electronic fabric with incorporated chip and interconnect | Ravi Pillarisetty, Brian S. Doyle | 2016-02-02 |
| 9165824 | Interconnects with fully clad lines | Manish Chandhok, Hui Jae Yoo, Ramanan V. Chebiam, Colin T. Carver | 2015-10-20 |
| 9129844 | Vertical meander inductor for small core voltage regulators | Kevin P. O'Brien | 2015-09-08 |
| 9105344 | Shut-off mechanism in an integrated circuit device | Kelin J. Kuhn, Marko Radosavljevic | 2015-08-11 |
| 9054164 | Method of forming high density, high shorting margin, and low capacitance interconnects by alternating recessed trenches | Jasmeet S. Chawla | 2015-06-09 |
| 8941128 | Passivation layer for flexible display | Ravi Pillarisetty, Sairam Agraharam, John S. Guzek | 2015-01-27 |
| 8803283 | Vertical meander inductor for small core voltage regulators | Kevin P. O'Brien | 2014-08-12 |
| 8508018 | Barrier layers | Rohan Akolkar, Sridhar Balakrishnan, James S. Clarke, Philip Yashar | 2013-08-13 |
| 8441097 | Methods to form memory devices having a capacitor with a recessed electrode | Joseph M. Steigerwald, Nick Lindert, Steven J. Keating, Timothy E. Glassman | 2013-05-14 |
| 7981756 | Common plate capacitor array connections, and processes of making same | Nick Lindert, Brian S. Doyle, Dinesh Somasekhar, Swaminathan Sivakumar, Kevin X. Zhang +1 more | 2011-07-19 |
| 6568294 | Shifter with automatic and manual shift modes and with shift position indicators | — | 2003-05-27 |