Issued Patents All Time
Showing 26–50 of 93 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12033894 | Gate aligned contact and method to fabricate same | Oleg Golonzka, Swaminathan Sivakumar, Tahir Ghani | 2024-07-09 |
| 12002678 | Gate spacing in integrated circuit structures | Mohit K. HARAN, Paul A. Nyhus, Gurpreet Singh, Eungnak Han, David Shykind +1 more | 2024-06-04 |
| 11972979 | 1D vertical edge blocking (VEB) via and plug | Leonard P. GULER, Michael K. Harper, Suzanne S. Rich, Curtis W. Ward, Richard E. Schenker +4 more | 2024-04-30 |
| 11854787 | Advanced lithography and self-assembled devices | Richard E. Schenker, Robert L. Bristol, Kevin Lin, Florian Gstrein, James M. Blackwell +6 more | 2023-12-26 |
| 11756829 | Gate aligned contact and method to fabricate same | Oleg Golonzka, Swaminathan Sivakumar, Tahir Ghani | 2023-09-12 |
| 11721580 | 1D vertical edge blocking (VEB) via and plug | Leonard P. GULER, Michael K. Harper, Suzanne S. Rich, Curtis W. Ward, Richard E. Schenker +4 more | 2023-08-08 |
| 11710636 | Metal and spacer patterning for pitch division with multiple line widths and spaces | Kevin Lin | 2023-07-25 |
| 11664274 | Method to repair edge placement errors in a semiconductor device | Mohit K. HARAN, Gopinath Bhimarasetti | 2023-05-30 |
| 11652045 | Via contact patterning method to increase edge placement error margin | Mohit K. HARAN, Daniel James Bahr, Deepak S. Rao, Marvin Young Paik, Seungdo An +6 more | 2023-05-16 |
| 11594448 | Vertical edge blocking (VEB) technique for increasing patterning process margin | Leonard P. GULER, Chul-Hyun Lim, Paul A. Nyhus, Elliot N. Tan | 2023-02-28 |
| 11527433 | Via and plug architectures for integrated circuit interconnects and methods of manufacture | Leonard P. GULER, Paul A. Nyhus | 2022-12-13 |
| 11495496 | Gate aligned contact and method to fabricate same | Oleg Golonzka, Swaminathan Sivakumar, Tahir Ghani | 2022-11-08 |
| 11476190 | Fuse lines and plugs for semiconductor devices | Balijeet S. Bains, Zhanping Chen | 2022-10-18 |
| 11417567 | Conductive cap-based approaches for conductive via fabrication and structures resulting therefrom | Florian Gstrein, Eungnak Han, Rami Hourani, Ruth A. Brain, Paul A. Nyhus +2 more | 2022-08-16 |
| 11373950 | Advanced lithography and self-assembled devices | Richard E. Schenker, Robert L. Bristol, Kevin Lin, Florian Gstrein, James M. Blackwell +6 more | 2022-06-28 |
| 11251117 | Self aligned gratings for tight pitch interconnects and methods of fabrication | Manish Chandhok, Leonard P. GULER, Paul A. Nyhus, Gobind Bisht, Jonathan Laib +5 more | 2022-02-15 |
| 11211324 | Via contact patterning method to increase edge placement error margin | Mohit K. HARAN, Daniel James Bahr, Deepak S. Rao, Marvin Young Paik, Seungdo An +6 more | 2021-12-28 |
| 11171043 | Plug and trench architectures for integrated circuits and methods of manufacture | Marvin Young Paik, Hyunsoo Park, Mohit K. HARAN, Alexander F. Kaplan, Ruth A. Brain | 2021-11-09 |
| 11145541 | Conductive via and metal line end fabrication and structures resulting therefrom | Reken Patel, Hyunsoo Park, Mohit K. HARAN, Debashish Basu, Curtis W. Ward +1 more | 2021-10-12 |
| 11107786 | Pattern decomposition lithography techniques | Hossam A. Abdallah, Elliot N. Tan, Swaminathan Sivakumar, Oleg Golonzka, Robert M. Bigwood | 2021-08-31 |
| 10991599 | Self-aligned via and plug patterning for back end of line (BEOL) interconnects | Paul A. Nyhus | 2021-04-27 |
| 10910265 | Gate aligned contact and method to fabricate same | Oleg Golonzka, Swaminathan Sivakumar, Tahir Ghani | 2021-02-02 |
| 10892223 | Advanced lithography and self-assembled devices | Richard E. Schenker, Robert L. Bristol, Kevin Lin, Florian Gstrein, James M. Blackwell +6 more | 2021-01-12 |
| 10770291 | Methods and masks for line end formation for back end of line (BEOL) interconnects and structures resulting therefrom | Richard E. Schenker | 2020-09-08 |
| 10678137 | Multi-pass patterning using nonreflecting radiation lithography on an underlying grating | Manish Chandhok, Todd R. Younkin, Sang Hun Lee | 2020-06-09 |