VN

Vijay Narayanan

IBM: 233 patents #125 of 70,183Top 1%
Globalfoundries: 29 patents #87 of 4,424Top 2%
UL Ulvac: 7 patents #38 of 680Top 6%
TL Tokyo Electron Limited: 4 patents #1,723 of 5,567Top 35%
UA U.S. Bank National Association: 4 patents #5 of 53Top 10%
YH Yahoo Holdings: 3 patents #543 of 2,500Top 25%
Microsoft: 2 patents #17,506 of 40,388Top 45%
SF SUNY Research Foundation: 1 patents #469 of 1,165Top 45%
FI Fair Issac: 1 patents #1 of 12Top 9%
CN CNRS: 1 patents #3,857 of 11,908Top 35%
📍 San Jose, CA: #34 of 32,062 inventorsTop 1%
🗺 California: #331 of 386,348 inventorsTop 1%
Overall (All Time): #1,875 of 4,157,543Top 1%
256
Patents All Time

Issued Patents All Time

Showing 201–225 of 256 patents

Patent #TitleCo-InventorsDate
7895206 Search query categrization into verticals Jiangyi Pan 2011-02-22
7880243 Simple low power circuit structure with metal gate and high-k dielectric Bruce B. Doris, Eduard A. Cartier, Barry P. Linder, Vamsi K. Paruchuri 2011-02-01
7872317 Dual metal gate self-aligned integration Alessandro C. Callegari, Michael P. Chudzik, Bruce B. Doris, Vamsi K. Paruchuri, Michelle L. Steen 2011-01-18
7870151 Fast accurate fuzzy matching Uwe Mayer, Matthias Blume 2011-01-11
7863083 High temperature processing compatible metal gate electrode for pFETS and methods for fabrication Ricky S. Amos, Douglas A. Buchanan, Cyril Cabral, Jr., Alessandro C. Callegari, Supratik Guha +4 more 2011-01-04
7863126 Fabrication of a CMOS structure with a high-k dielectric layer oxidizing an aluminum layer in PFET region Dae-Gyu Park, Michael P. Chudzik, Vamsi K. Paruchuri 2011-01-04
7858500 Low threshold voltage semiconductor device with dual threshold voltage control means Eduard A. Cartier, Matthew W. Copel, Martin M. Frank, Evgeni Gousev, Paul C. Jamison +2 more 2010-12-28
7855105 Planar and non-planar CMOS devices with multiple tuned threshold voltages Hemanth Jagannathan, Vamsi K. Paruchuri 2010-12-21
7847356 Metal gate high-K devices having a layer comprised of amorphous silicon Tze-Chiang Chen, Bruce B. Doris, Vamsi K. Paruchuri 2010-12-07
7838908 Semiconductor device having dual metal gates and method of manufacture Unoh Kwon, Siddarth A. Krishnan, Takashi Ando, Michael P. Chudzik, Martin M. Frank +5 more 2010-11-23
7833849 Method of fabricating a semiconductor structure including one device region having a metal gate electrode located atop a thinned polygate electrode Alessandro C. Callegari, Tze-Chiang Chen, Michael P. Chudzik, Bruce B. Doris, Young-Hee Kim +3 more 2010-11-16
7821081 Method and apparatus for flatband voltage tuning of high-k field effect transistors Supratik Guha, Vamsi K. Paruchuri 2010-10-26
7820552 Advanced high-k gate stack patterning and structure containing a patterned high-k gate stack Siva Kanakasabapathy, Ying Zhang, Edmund M. Sikorski, Hongwen Yan, Vamsi K. Paruchuri +1 more 2010-10-26
7807525 Low power circuit structure with metal gate and high-k dielectric Bruce B. Doris, Eduard A. Cartier, Barry P. Linder, Vamsi K. Paruchuri 2010-10-05
7790592 Method to fabricate metal gate high-k devices Tze-Chiang Chen, Bruce B. Doris, Vamsi K. Paruchuri 2010-09-07
7785999 Formation of fully silicided metal gate using dual self-aligned silicide process Cyril Cabral, Jr., Chester T. Dziobkowski, Sunfei Fang, Evgeni Gousev, Rajarao Jammy +4 more 2010-08-31
7776701 Metal oxynitride as a pFET material Alessandro C. Callegari, Michael A. Gribelyuk, Vamsi K. Paruchuri, Sufi Zafar 2010-08-17
7772016 Method for composition control of a metal compound film Russell D. Allen, Stephen L. Brown, Alessandro C. Callegari, Michael P. Chudzik, Vamsi K. Paruchuri 2010-08-10
7750418 Introduction of metal impurity to change workfunction of conductive electrodes Michael P. Chudzik, Bruce B. Doris, Supratik Guha, Rajarao Jammy, Vamsi K. Paruchuri +2 more 2010-07-06
7745278 Selective implementation of barrier layers to achieve threshold voltage control in CMOS device fabrication with high K dielectrics Nestor A. Bojarczuk, Cyril Cabral, Jr., Eduard A. Cartier, Matthew W. Copel, Martin M. Frank +4 more 2010-06-29
7723798 Low power circuit structure with metal gate and high-k dielectric Bruce B. Doris, Eduard A. Cartier, Barry P. Linder, Vamsi K. Paruchuri 2010-05-25
7718496 Techniques for enabling multiple Vt devices using high-K metal gate stacks Martin M. Frank, Arvind Kumar, Vamsi K. Paruchuri, Jeffrey W. Sleight 2010-05-18
7709902 Metal gate CMOS with at least a single gate metal and dual gate dielectrics Bruce B. Doris, Young-Hee Kim, Barry P. Linder, Vamsi K. Paruchuri 2010-05-04
7696036 CMOS transistors with differential oxygen content high-k dielectrics Huiming Bu, Eduard A. Cartier, Bruce B. Doris, Young-Hee Kim, Barry P. Linder +2 more 2010-04-13
7682917 Disposable metallic or semiconductor gate spacer Stephen W. Bedell, Michael P. Chudzik, William K. Henson, Naim Moumen, Devendra K. Sadana +2 more 2010-03-23