VN

Vijay Narayanan

IBM: 233 patents #125 of 70,183Top 1%
Globalfoundries: 29 patents #87 of 4,424Top 2%
UL Ulvac: 7 patents #38 of 680Top 6%
TL Tokyo Electron Limited: 4 patents #1,723 of 5,567Top 35%
UA U.S. Bank National Association: 4 patents #5 of 53Top 10%
YH Yahoo Holdings: 3 patents #543 of 2,500Top 25%
Microsoft: 2 patents #17,506 of 40,388Top 45%
SF SUNY Research Foundation: 1 patents #469 of 1,165Top 45%
FI Fair Issac: 1 patents #1 of 12Top 9%
CN CNRS: 1 patents #3,857 of 11,908Top 35%
📍 San Jose, CA: #34 of 32,062 inventorsTop 1%
🗺 California: #331 of 386,348 inventorsTop 1%
Overall (All Time): #1,875 of 4,157,543Top 1%
256
Patents All Time

Issued Patents All Time

Showing 226–250 of 256 patents

Patent #TitleCo-InventorsDate
7666732 Method of fabricating a metal gate CMOS with at least a single gate metal and dual gate dielectrics Bruce B. Doris, Young-Hee Kim, Barry P. Linder, Vamsi K. Paruchuri 2010-02-23
7655557 CMOS silicide metal gate integration Ricky S. Amos, Diane C. Boyd, Cyril Cabral, Jr., Richard D. Kaplan, Jakub Kedzierski +6 more 2010-02-02
7655994 Low threshold voltage semiconductor device with dual threshold voltage control means Eduard A. Cartier, Mathew W. Copel, Martin M. Frank, Evgeni Gousev, Paul C. Jamison +2 more 2010-02-02
7648864 Semiconductor structure including mixed rare earth oxide formed on silicon Nestor A. Bojarczuk, Douglas A. Buchanan, Supratik Guha, Lars-Ake Ragnarsson 2010-01-19
7611979 Metal gates with low charge trapping and enhanced dielectric reliability characteristics for high-k gate dielectric stacks Alessandro C. Callegari, Michael P. Chudzik, Barry P. Linder, Renee T. Mo, Dae-Gyu Park +2 more 2009-11-03
7598545 Using metal/metal nitride bilayers as gate electrodes in self-aligned aggressively scaled CMOS devices Eduard A. Cartier, Matthew W. Copel, Bruce B. Doris, Rajarao Jammy, Young-Hee Kim +3 more 2009-10-06
7569466 Dual metal gate self-aligned integration Alessandro C. Callegari, Michael P. Chudzik, Bruce B. Doris, Vamsi K. Paruchuri, Michelle L. Steen 2009-08-04
7566938 Deposition of hafnium oxide and/or zirconium oxide and fabrication of passivated electronic structures Cyril Cabral, Jr., Alessandro C. Callegari, Michael A. Gribelyuk, Paul C. Jamison, Dianne L. Lacey +4 more 2009-07-28
7488656 Removal of charged defects from metal oxide-gate stacks Eduard A. Cartier, Matthew W. Copel, Supratik Guha, Richard A. Haight, Fenton R. McFeely 2009-02-10
7479683 Selective implementation of barrier layers to achieve threshold voltage control in CMOS device fabrication with high-k dielectrics Nestor A. Bojarczuk, Cyril Cabral, Jr., Eduard A. Cartier, Matthew W. Copel, Martin M. Frank +4 more 2009-01-20
7452767 Selective implementation of barrier layers to achieve threshold voltage control in CMOS device fabrication with high k dielectrics Nestor A. Bojarczuk, Cyril Cabral, Jr., Eduard A. Cartier, Matthew W. Copel, Martin M. Frank +4 more 2008-11-18
7446380 Stabilization of flatband voltages and threshold voltages in hafnium oxide based silicon transistors for CMOS Nestor A. Bojarczuk, Michael P. Chudzik, Matthew W. Copel, Supratik Guha, Rajarao Jammy +1 more 2008-11-04
7436034 Metal oxynitride as a pFET material Alessandro C. Callegari, Michael A. Gribelyuk, Vamsi K. Paruchuri, Sufi Zafar 2008-10-14
7432550 Semiconductor structure including mixed rare earth oxide formed on silicon Nestor A. Bojarczuk, Douglas A. Buchanan, Supratik Guha, Lars-Ake Ragnarsson 2008-10-07
7432567 Metal gate CMOS with at least a single gate metal and dual gate dielectrics Bruce B. Doris, Young-Hee Kim, Barry P. Linder, Vamsi K. Paruchuri 2008-10-07
7425497 Introduction of metal impurity to change workfunction of conductive electrodes Michael P. Chudzik, Bruce B. Doris, Supratik Guha, Rajarao Jammy, Vamsi K. Paruchuri +2 more 2008-09-16
7411227 CMOS silicide metal gate integration Ricky S. Amos, Diane C. Boyd, Cyril Cabral, Jr., Richard D. Kaplan, Jakub Kedzierski +6 more 2008-08-12
7348226 Method of forming lattice-matched structure on silicon and structure formed thereby Nestor A. Bojarczuk, Matthew W. Copel, Supratik Guha 2008-03-25
7271455 Formation of fully silicided metal gate using dual self-aligned silicide process Cyril Cabral, Jr., Chester T. Dziobkowski, Sunfei Fang, Evgeni Gousev, Rajarao Jammy +4 more 2007-09-18
7242055 Nitrogen-containing field effect transistor gate stack containing a threshold voltage control layer formed via deposition of a metal oxide Nestor A. Bojarczuk, Cyril Cabral, Jr., Eduard A. Cartier, Martin M. Frank, Evgeni Gousev +4 more 2007-07-10
7115959 Method of forming metal/high-k gate stacks with high mobility Wanda Andreoni, Alessandro C. Callegari, Eduard A. Cartier, Alessandro Curioni, Christopher P. D'Emic +9 more 2006-10-03
7105889 Selective implementation of barrier layers to achieve threshold voltage control in CMOS device fabrication with high k dielectrics Nestor A. Bojarczuk, Cyril Cabral, Jr., Eduard A. Cartier, Matthew W. Copel, Martin M. Frank +4 more 2006-09-12
7071122 Field effect transistor with etched-back gate dielectric Katherine L. Saenger, Rajarao Jammy 2006-07-04
7067422 Method of forming a tantalum-containing gate electrode structure Kazuhito Nakamura, Hideaki Yamasaki, Yumiko Kawano, Gert Leusink, Fenton R. McFeely +1 more 2006-06-27
7056782 CMOS silicide metal gate integration Ricky S. Amos, Diane C. Boyd, Cyril Cabral, Jr., Richard D. Kaplan, Jakub Kedzierski +6 more 2006-06-06