Issued Patents All Time
Showing 1–6 of 6 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9711365 | Etch rate enhancement for a silicon etch process through etch chamber pretreatment | Eric A. Joseph, Goh Matsuura, Masahiro Nakamura, Bang N. To | 2017-07-18 |
| 8928124 | High aspect ratio and reduced undercut trench etch process for a semiconductor substrate | Nicholas C. M. Fuller, Eric A. Joseph, Goh Matsuura | 2015-01-06 |
| 8652969 | High aspect ratio and reduced undercut trench etch process for a semiconductor substrate | Nicholas C. M. Fuller, Eric A. Joseph, Goh Matsuura | 2014-02-18 |
| 7820552 | Advanced high-k gate stack patterning and structure containing a patterned high-k gate stack | Siva Kanakasabapathy, Ying Zhang, Hongwen Yan, Vijay Narayanan, Vamsi K. Paruchuri +1 more | 2010-10-26 |
| 6743686 | Sacrificial polysilicon sidewall process and rapid thermal spike annealing for advance CMOS fabrication | Kam-Leung Lee, Ying Zhang, Maheswaran Surendra | 2004-06-01 |
| 6518136 | Sacrificial polysilicon sidewall process and rapid thermal spike annealing for advance CMOS fabrication | Kam-Leung Lee, Ying Zhang, Maheswaran Surendra | 2003-02-11 |