Issued Patents All Time
Showing 51–75 of 96 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8426921 | Three-dimensional integrated circuits and techniques for fabrication thereof | Solomon Assefa, Kuan-Neng Chen, Yuri A. Vlasov | 2013-04-23 |
| 8415772 | Method to prevent surface decomposition of III-V compound semiconductors | Joel P. de Souza, Keith E. Fogel, Edward W. Kiewra, Christopher C. Parks, Devendra K. Sadana +1 more | 2013-04-09 |
| 8399336 | Method for fabricating a 3D integrated circuit device having lower-cost active circuitry layers stacked before higher-cost active circuitry layer | Mukta G. Farooq, Robert Hannon, Subramanian S. Iyer, Fei Liu, Sampath Purushothaman +2 more | 2013-03-19 |
| 8378429 | Selective floating body SRAM cell | Josephine B. Chang, Leland Chang, Jeffrey W. Sleight | 2013-02-19 |
| 8349670 | Selective floating body SRAM cell | Josephine B. Chang, Leland Chang, Jeffrey W. Sleight | 2013-01-08 |
| 8343838 | Method of reducing dislocation-induced leakage in a strained-layer field-effect transistor by implanting blocking impurity into the strained-layer | — | 2013-01-01 |
| 8298914 | 3D integrated circuit device fabrication using interface wafer as permanent carrier | Mukta G. Farooq, Robert Hannon, Subramanian S. Iyer, Fei Liu, Sampath Purushothaman +2 more | 2012-10-30 |
| 8273649 | Method to prevent surface decomposition of III-V compound semiconductors | Joel P. de Souza, Keith E. Fogel, Edward W. Kiewra, Christopher C. Parks, Devendra K. Sadana +1 more | 2012-09-25 |
| 8263477 | Structure for use in fabrication of PiN heterojunction TFET | Sarunya Bangsaruntip, Isaac Lauer, Jeffrey W. Sleight | 2012-09-11 |
| 8258031 | Fabrication of a vertical heterojunction tunnel-FET | Isaac Lauer, Amlan Majumdar, Paul M. Solomon | 2012-09-04 |
| 8247904 | Interconnection between sublithographic-pitched structures and lithographic-pitched structures | Sarunya Bangsaruntip, Daniel C. Edelstein, William D. Hinsberg, Ho-Cheol Kim, Paul M. Soloman | 2012-08-21 |
| 8212218 | Dosimeter powered by passive RF absorption | Cyril Cabral, Jr., Michael S. Gordon, Conal E. Murray, Kenneth P. Rodbell, Stephen M. Rossnagel +2 more | 2012-07-03 |
| 8158515 | Method of making 3D integrated circuits | Mukta G. Farooq, Subramanian S. Iyer, Huilong Zhu | 2012-04-17 |
| 8129256 | 3D integrated circuit device fabrication with precisely controllable substrate removal | Mukta G. Farooq, Robert Hannon, Subramanian S. Iyer, Sampath Purushothaman, Roy R. Yu | 2012-03-06 |
| 8129811 | Techniques for three-dimensional circuit integration | Solomon Assefa, Kuan-Neng Chen, Yuri A. Vlasov | 2012-03-06 |
| 8080805 | FET radiation monitor | Michael S. Gordon, Kenneth P. Rodbell, Jeng-Bang Yau | 2011-12-20 |
| 8018007 | Selective floating body SRAM cell | Josephine B. Chang, Leland Chang, Jeffrey W. Sleight | 2011-09-13 |
| 7989900 | Semiconductor structure including gate electrode having laterally variable work function | Wilfried E. Haensch, Amlan Majumdat | 2011-08-02 |
| 7985633 | Embedded DRAM integrated circuits with extremely thin silicon-on-insulator pass transistors | Jin Cai, Josephine B. Chang, Leland Chang, Brian L. Ji, Amlan Majumdar | 2011-07-26 |
| 7964896 | Buried channel MOSFET using III-V compound semiconductors and high k gate dielectrics | Edward W. Kiewra, Devendra K. Sadana, Ghavam G. Shahidi, Yanning Sun | 2011-06-21 |
| 7955887 | Techniques for three-dimensional circuit integration | Solomon Assefa, Kuan-Neng Chen, Yurii A. Vlasov | 2011-06-07 |
| 7915653 | Structure for and method of fabricating a high-speed CMOS-compatible Ge-on-insulator photodetector | Jack O. Chu, Gabriel Dehlinger, Alfred Grill, Qiqing C. Ouyang, Jeremy D. Schaub | 2011-03-29 |
| 7897428 | Three-dimensional integrated circuits and techniques for fabrication thereof | Solomon Assefa, Kuan-Neng Chen, Yurii A. Vlasov | 2011-03-01 |
| 7871869 | Extremely-thin silicon-on-insulator transistor with raised source/drain | Eduard A. Cartier, Kingsuk Maitra, Amlan Majumdar, Renee T. Mo | 2011-01-18 |
| 7781288 | Semiconductor structure including gate electrode having laterally variable work function | Wilfried E. Haensch, Amlan Majumdar | 2010-08-24 |