Issued Patents All Time
Showing 26–50 of 59 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10877202 | Surface light source assembly and refrigerator having the same | Haidong Tang, Guangrui Wu, Ming-Theng Wang, Ning Wang, Falin Yang | 2020-12-29 |
| 10804181 | Heterogeneous thermal interface material for corner and or edge degradation mitigation | Marcus E. Interrante, Sushumna Iruvanti, Tuhin Sinha | 2020-10-13 |
| 10685919 | Reduced-warpage laminate structure | Mark C. Lamorey, Janak G. Patel, Douglas O. Powell, David J. Russell, Peter Slota, Jr. +1 more | 2020-06-16 |
| 10636750 | Step pyramid shaped structure to reduce dicing defects | Kirk D. Peterson, Nicolas Pizzuti, Thomas M. Shaw, Thomas A. Wassick | 2020-04-28 |
| 10636746 | Method of forming an electronic package | Kamal K. Sikka, Krishna R. Tunga, Hilton T. Toy, Thomas Weiss, Sushumna Iruvanti | 2020-04-28 |
| 10607928 | Reduction of laminate failure in integrated circuit (IC) device carrier | Anson J. Call, Sushumna Iruvanti, Brian W. Quinlan, Kamal K. Sikka, Rui Wang | 2020-03-31 |
| 10593564 | Lid attach optimization to limit electronic package warpage | Sushumna Iruvanti, Kamal K. Sikka, Hilton T. Toy, Jeffrey A. Zitz | 2020-03-17 |
| 10566313 | Integrated circuit chip carrier with in-plane thermal conductance layer | Kamal K. Sikka | 2020-02-18 |
| 10460956 | Interposer with lattice construction and embedded conductive metal structures | Jean Audet, Benjamin V. Fasano | 2019-10-29 |
| 10381276 | Test cell for laminate and method | Sushumna Iruvanti, Marek A. Orlowski, David L. Questad, Tuhin Sinha, Krishna R. Tunga +3 more | 2019-08-13 |
| 10332813 | Lid attach optimization to limit electronic package warpage | Sushumna Iruvanti, Kamal K. Sikka, Hilton T. Toy, Jeffrey A. Zitz | 2019-06-25 |
| 10249548 | Test cell for laminate and method | Sushumna Iruvanti, Marek A. Orlowski, David L. Questad, Tuhin Sinha, Krishna R. Tunga +3 more | 2019-04-02 |
| 10083886 | Lid attach optimization to limit electronic package warpage | Sushumna Iruvanti, Kamal K. Sikka, Hilton T. Toy, Jeffrey A. Zitz | 2018-09-25 |
| 10083919 | Packaging for high speed chip to chip communication | — | 2018-09-25 |
| 10056268 | Limiting electronic package warpage | — | 2018-08-21 |
| 10049896 | Lid attach optimization to limit electronic package warpage | Sushumna Iruvanti, Kamal K. Sikka, Hilton T. Toy, Jeffrey A. Zitz | 2018-08-14 |
| 9953935 | Packaging for high speed chip to chip communication | — | 2018-04-24 |
| 9947603 | Lid attach optimization to limit electronic package warpage | Sushumna Iruvanti, Kamal K. Sikka, Hilton T. Toy, Jeffrey A. Zitz | 2018-04-17 |
| 9892935 | Limiting electronic package warpage with semiconductor chip lid and lid-ring | — | 2018-02-13 |
| 9818682 | Laminate substrates having radial cut metallic planes | Edmund Blackshear | 2017-11-14 |
| 9775794 | Use of gelatin or deeply processed gelatin materials in preparation of hair quality-improving compositions | Xiangshan Zhou, Jinhua You, Shousheng Tian, Chuanliang Ji, Yan Zhang +4 more | 2017-10-03 |
| 9673064 | Interposer with lattice construction and embedded conductive metal structures | Jean Audet, Benjamin V. Fasano | 2017-06-06 |
| 9666539 | Packaging for high speed chip to chip communication | — | 2017-05-30 |
| 9613915 | Reduced-warpage laminate structure | Mark C. Lamorey, Janak G. Patel, Douglas O. Powell, David J. Russell, Peter Slota, Jr. +1 more | 2017-04-04 |
| 9543255 | Reduced-warpage laminate structure | Mark C. Lamorey, Janak G. Patel, Douglas O. Powell, David J. Russell, Peter Slota, Jr. +1 more | 2017-01-10 |