Issued Patents All Time
Showing 51–75 of 88 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7312487 | Three dimensional integrated circuit | Syed M. Alam, Ibrahim M. Elfadel, Kathryn Guarini, Prabhakar Kudva, David S. Kung +2 more | 2007-12-25 |
| 7291886 | Hybrid substrate technology for high-mobility planar and multiple-gate MOSFETs | Bruce B. Doris, Edward J. Nowak, Min Yang | 2007-11-06 |
| 7288445 | Double gated transistor and method of fabrication | Andres Bryant, K. Paul Muller, Edward J. Nowak, David M. Fried, Jed H. Rankin | 2007-10-30 |
| 7268377 | Structure and method of fabricating a hybrid substrate for high-performance hybrid-orientation silicon-on-insulator CMOS devices | Min Yang | 2007-09-11 |
| 7259049 | Self-aligned isolation double-gate FET | Kevin K. Chan, Guy M. Cohen, Ronnen Andrew Roy, Paul M. Solomon, Min Yang | 2007-08-21 |
| 7247569 | Ultra-thin Si MOSFET device structure and method of manufacture | Diane C. Boyd, Bruce B. Doris, Devendra K. Sadana | 2007-07-24 |
| 7244958 | Integration of strained Ge into advanced CMOS technology | Huiling Shang, Jack O. Chu, Kathryn Guarini | 2007-07-17 |
| 7220626 | Structure and method for manufacturing planar strained Si/SiGe substrate with multiple orientations and different stress levels | Huilong Zhu, Bruce B. Doris, Philip J. Oldiges, Min Yang, Huajie Chen | 2007-05-22 |
| 7211490 | Ultra thin channel MOSFET | Bruce B. Doris, Thomas S. Kanarsky, Ying Zhang, Huilong Zhu, Omer H. Dokumaci | 2007-05-01 |
| 7205185 | Self-aligned planar double-gate process by self-aligned oxidation | Omer H. Dokumaci, Bruce B. Doris, Kathryn Guarini, Suryanarayan G. Hegde, Erin C. Jones | 2007-04-17 |
| 7183182 | Method and apparatus for fabricating CMOS field effect transistors | Cyril Cabral, Jr., Jakub Kedzierski | 2007-02-27 |
| 7141457 | Method to form Si-containing SOI and underlying substrate with different orientations | Devendra K. Sadana, Ghavam G. Shahidi | 2006-11-28 |
| 7138683 | Self-aligned SOI with different crystal orientation using WAFER bonding and SIMOX processes | Kathryn Guarini, Leathen Shi, Min Yang | 2006-11-21 |
| 7098508 | Ultra-thin silicon-on-insulator and strained-silicon-direct-on-insulator with hybrid crystal orientations | Min Yang | 2006-08-29 |
| 7094634 | Structure and method for manufacturing planar SOI substrate with multiple orientations | Huilong Zhu, Bruce B. Doris, Phillip J. Oldiges, Min Yang | 2006-08-22 |
| 7091069 | Ultra thin body fully-depleted SOI MOSFETs | Bruce B. Doris, Zhibin Ren, Paul M. Solomon, Min Yang | 2006-08-15 |
| 7087965 | Strained silicon CMOS on hybrid crystal orientations | Kevin K. Chan, Alexander Reznicek, Devendra K. Sadana, Leathen Shi, Min Yang | 2006-08-08 |
| 7075150 | Ultra-thin Si channel MOSFET using a self-aligned oxygen implant and damascene technique | Diane C. Boyd, Bruce B. Doris, Devendra K. Sadana | 2006-07-11 |
| 7041538 | Method of manufacturing a disposable reversed spacer process for high performance recessed channel CMOS | Omer H. Dokumaci, Thomas S. Kanarsky, Victor Ku | 2006-05-09 |
| 7023055 | CMOS on hybrid substrate with different crystal orientations using silicon-to-silicon direct wafer bonding | Alexander Reznicek, Min Yang | 2006-04-04 |
| 7023057 | CMOS on hybrid substrate with different crystal orientations using silicon-to-silicon direct wafer bonding | Alexander Reznicek, Min Yang | 2006-04-04 |
| 7018891 | Ultra-thin Si channel CMOS with improved series resistance | Bruce B. Doris, Thomas S. Kanarsky | 2006-03-28 |
| 7002214 | Ultra-thin body super-steep retrograde well (SSRW) FET devices | Diane C. Boyd, Judson R. Holt, Renee T. Mo, Zhibin Ren, Ghavam G. Shahidi | 2006-02-21 |
| 6960806 | Double gated vertical transistor with different first and second gate materials | Andres Bryant, K. Paul Muller, Edward J. Nowak, David M. Fried, Jed H. Rankin | 2005-11-01 |
| 6946696 | Self-aligned isolation double-gate FET | Kevin K. Chan, Guy M. Cohen, Ronnen Andrew Roy, Paul M. Solomon, Min Yang | 2005-09-20 |