Issued Patents All Time
Showing 1–25 of 30 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7259049 | Self-aligned isolation double-gate FET | Kevin K. Chan, Guy M. Cohen, Meikei Ieong, Paul M. Solomon, Min Yang | 2007-08-21 |
| 7102234 | Method and structure for reduction of contact resistance of metal silicides using a metal-germanium alloy | Cyril Cabral, Jr., Roy A. Carruthers, James M. E. Harper, Christian Lavoie, Yun-Yu Wang | 2006-09-05 |
| 7081676 | Structure for controlling the interface roughness of cobalt disilicide | Paul D. Agnello, Cyril Cabral, Jr., Roy A. Carruthers, James M. E. Harper, Christian Lavoie +4 more | 2006-07-25 |
| 7074684 | Elevated source drain disposable spacer CMOS | Cyril Cabral, Jr., Christian Lavoie, Kam-Leung Lee | 2006-07-11 |
| 6987050 | Self-aligned silicide (salicide) process for low resistivity contacts to thin film silicon-on-insulator and bulk MOSFETS and for shallow junctions | Cyril Cabral, Jr., Kevin K. Chan, Guy M. Cohen, Christian Lavoie, Paul M. Solomon | 2006-01-17 |
| 6972250 | Method and structure for ultra-low contact resistance CMOS formed by vertically self-aligned CoSi2 on raised source drain Si/SiGe device | Cyril Cabral, Jr., Roy A. Carruthers, Kevin K. Chan, Jack O. Chu, Guy M. Cohen +2 more | 2005-12-06 |
| 6946696 | Self-aligned isolation double-gate FET | Kevin K. Chan, Guy M. Cohen, Meikei Ieong, Paul M. Solomon, Min Yang | 2005-09-20 |
| 6809030 | Method and structure for controlling the interface roughness of cobalt disilicide | Paul D. Agnello, Cyril Cabral, Jr., Roy A. Carruthers, James M. E. Harper, Christian Lavoie +4 more | 2004-10-26 |
| 6777298 | Elevated source drain disposable spacer CMOS | Cyril Cabral, Jr., Christian Lavoie, Kam-Leung Lee | 2004-08-17 |
| 6753606 | Method and structure for reduction of contact resistance of metal silicides using a metal-germanium alloy | Cyril Cabral, Jr., Roy A. Carruthers, James M. E. Harper, Christian Lavoie, Yun-Yu Wang | 2004-06-22 |
| 6727135 | All-in-one disposable/permanent spacer elevated source/drain, self-aligned silicide CMOS | Kam-Leung Lee | 2004-04-27 |
| 6716708 | Self-aligned silicide process utilizing ion implants for reduced silicon consumption and control of the silicide formation temperature and structure formed thereby | Cyril Cabral, Jr., Kevin K. Chan, Guy M. Cohen, Kathryn Guarini, Christian Lavoie +1 more | 2004-04-06 |
| 6690072 | Method and structure for ultra-low contact resistance CMOS formed by vertically self-aligned CoSi2 on raised source drain Si/SiGe device | Cyril Cabral, Jr., Roy A. Carruthers, Kevin K. Chan, Jack O. Chu, Guy M. Cohen +2 more | 2004-02-10 |
| 6614079 | All-in-one disposable/permanent spacer elevated source/drain, self-aligned silicide CMOS | Kam-Leung Lee | 2003-09-02 |
| 6555880 | Self-aligned silicide process utilizing ion implants for reduced silicon consumption and control of the silicide formation temperature and structure formed thereby | Cyril Cabral, Jr., Kevin K. Chan, Guy M. Cohen, Kathryn Guarini, Christian Lavoie +1 more | 2003-04-29 |
| 6503833 | Self-aligned silicide (salicide) process for strained silicon MOSFET ON SiGe and structure formed thereby | Atul Ajmera, Cyril Cabral, Jr., Roy A. Carruthers, Kevin K. Chan, Guy M. Cohen +3 more | 2003-01-07 |
| 6440851 | Method and structure for controlling the interface roughness of cobalt disilicide | Paul D. Agnello, Cyril Cabral, Jr., Roy A. Carruthers, James M. E. Harper, Christian Lavoie +4 more | 2002-08-27 |
| 6440808 | Damascene-gate process for the fabrication of MOSFET devices with minimum poly-gate depletion, silicided source and drain junctions, and low sheet resistance gate-poly | Diane C. Boyd, Stephen Bruce Brodsky, Hussein I. Hanafi | 2002-08-27 |
| 6413859 | Method and structure for retarding high temperature agglomeration of silicides using alloys | Cyril Cabral, Jr., Roy A. Carruthers, James M. E. Harper, Paul Kozlowski, Christian Lavoie +1 more | 2002-07-02 |
| 6410430 | Enhanced ultra-shallow junctions in CMOS using high temperature silicide process | Kam-Leung Lee | 2002-06-25 |
| 6331486 | Method and structure for reduction of contact resistance of metal silicides using a metal-germanium alloy | Cyril Cabral, Jr., Roy A. Carruthers, James M. E. Harper, Christian Lavoie, Yun-Yu Wang | 2001-12-18 |
| 6316123 | Microwave annealing | Kam-Leung Lee, David Lewis, Raman Viswanathan | 2001-11-13 |
| 6187679 | Low temperature formation of low resistivity titanium silicide | Cyril Cabral, Jr., Lawrence A. Clevenger, Francois M. d'Heurle, James M. E. Harper, Randy W. Mann +3 more | 2001-02-13 |
| 6051283 | Microwave annealing | Kam-Leung Lee, David Lewis, Raman Viswanathan | 2000-04-18 |
| 5828131 | Low temperature formation of low resistivity titanium silicide | Cyril Cabral, Jr., Lawrence A. Clevenger, Francois M. d'Heurle, James M. E. Harper, Randy W. Mann +3 more | 1998-10-27 |