Issued Patents All Time
Showing 25 most recent of 62 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11239753 | Switching converter, and control method and control circuit thereof | Yongqiang Yu, Jun Wang, Zhihua Ning | 2022-02-01 |
| 9515526 | Motor and rotor thereof | Hui Huang, Wenming Zhang, Yong Xiao, Xueying Zeng, Dongsuo Chen +1 more | 2016-12-06 |
| 9502933 | Permanent magnet synchronous electric machine | Hui Huang, Yusheng Hu, Dongsuo Chen, Yong Xiao, Xueying Zeng +1 more | 2016-11-22 |
| 9502934 | Motor rotor and motor having same | Hui Huang, Yusheng Hu, Dongsuo Chen, Yong Xiao, Xueying Zeng +1 more | 2016-11-22 |
| 9502930 | Motor rotor and motor having same | Hui Huang, Yusheng Hu, Dongsuo Chen, Yong Xiao, Xueying Zeng +1 more | 2016-11-22 |
| 9401424 | High performance stress-enhanced MOSFETs using Si:C and SiGe epitaxial source/drain and method of manufacture | Dureseti Chidambarrao, Omer H. Dokumaci | 2016-07-26 |
| 9023698 | High performance stress-enhanced MOSFETs using Si:C and SiGe epitaxial source/drain and method of manufacture | Dureseti Chidambarrao, Omer H. Dokumaci | 2015-05-05 |
| 8901566 | High performance stress-enhanced MOSFETs using Si:C and SiGe epitaxial source/drain and method of manufacture | Dureseti Chidambarrao, Omer H. Dokumaci | 2014-12-02 |
| 8168489 | High performance stress-enhanced MOSFETS using Si:C and SiGe epitaxial source/drain and method of manufacture | Dureseti Chidambarrao, Omer H. Dokumaci | 2012-05-01 |
| 8067805 | Ultra shallow junction formation by epitaxial interface limited diffusion | Omer H. Dokumaci, Oleg Gluschenkov, Werner Rausch | 2011-11-29 |
| 8053759 | Ion implantation for suppression of defects in annealed SiGe layers | Stephen W. Bedell, Keith E. Fogel, Devendra K. Sadana, Ghavam G. Shahidi | 2011-11-08 |
| 7923782 | Hybrid SOI/bulk semiconductor transistors | Huilong Zhu, Philip J. Oldiges, Bruce B. Doris, Xinlin Wang, Oleg Gluschenkov +1 more | 2011-04-12 |
| 7863197 | Method of forming a cross-section hourglass shaped channel region for charge carrier mobility modification | Dureseti Chidambarrao, Judson R. Holt, Qiqing C. Ouyang, Siddhartha Panda | 2011-01-04 |
| 7859013 | Metal oxide field effect transistor with a sharp halo | Judson R. Holt, Rangarajan Jagannathan, Wesley C. Natzle, Michael Sievers, Richard S. Wise | 2010-12-28 |
| 7816237 | Ultra shallow junction formation by epitaxial interface limited diffusion | Omer H. Dokumaci, Oleg Gluschenkov, Werner Rausch | 2010-10-19 |
| 7816664 | Defect reduction by oxidation of silicon | Stephen W. Bedell, Anthony G. Domenicucci, Keith E. Fogel, Devendra K. Sadana | 2010-10-19 |
| 7781800 | Embedded silicon germanium using a double buried oxide silicon-on-insulator wafer | Dureseti Chidambarrao, Dominic J. Schepis, Henry K. Utomo | 2010-08-24 |
| 7767503 | Hybrid SOI/bulk semiconductor transistors | Huilong Zhu, Philip J. Oldiges, Bruce B. Doris, Xinlin Wang, Oleg Gluschenkov +1 more | 2010-08-03 |
| 7750414 | Structure and method for reducing threshold voltage variation | Huilong Zhu, Yanfeng Wang, Daewon Yang | 2010-07-06 |
| 7723791 | Strained silicon directly-on-insulator substrate with hybrid crystalline orientation and different stress levels | Huilong Zhu, Bruce B. Doris, Patricia M. Mooney, Stephen W. Bedell | 2010-05-25 |
| 7713806 | Structures and methods for manufacturing of dislocation free stressed channels in bulk silicon and SOI MOS devices by gate stress engineering with SiGe and/or Si:C | Huilong Zhu, Bruce B. Doris | 2010-05-11 |
| 7682915 | Pre-epitaxial disposable spacer integration scheme with very low temperature selective epitaxy for enhanced device performance | Judson R. Holt, Kern Rim, Dominic J. Schepis | 2010-03-23 |
| 7679141 | High-quality SGOI by annealing near the alloy melting point | Stephen W. Bedell, Anthony G. Domenicucci, Keith E. Fogel, Richard J. Murphy, Devendra K. Sadana | 2010-03-16 |
| 7645656 | Structure and method for making strained channel field effect transistor using sacrificial spacer | Dureseti Chidambarrao, Sang-Hyun Oh, Siddhartha Panda, Werner Rausch, Tsutomu Sato +1 more | 2010-01-12 |
| 7550370 | Method of forming thin SGOI wafers with high relaxation and low stacking fault defect density | Stephen W. Bedell, Devendra K. Sadana, Dan M. Mocuta | 2009-06-23 |