Issued Patents All Time
Showing 451–475 of 635 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8896120 | Structures and methods for air gap integration | Maxime Darnon, Qinghuang Lin, Anthony D. Lisi, Satyanarayana V. Nitta | 2014-11-25 |
| 8889506 | Structure and method for interconnect spatial frequency doubling using selective ridges | John H. Zhang, Carl Radens, Yiheng Xu, Edem Wornyo | 2014-11-18 |
| 8859350 | Recessed gate field effect transistor | John H. Zhang, Yiheng Xu, Carl Radens | 2014-10-14 |
| 8856715 | Capacitor designs for integrated circuits utilizing self-aligned double patterning (SADP) | Jason E. Stephens, Vikrant Chauhan, Ning Lu, Albert M. Chu | 2014-10-07 |
| 8829670 | Through silicon via structure for internal chip cooling | John H. Zhang, Carl Radens, Yiheng Xu, Edem Wornyo | 2014-09-09 |
| 8828521 | Corrugated interfaces for multilayered interconnects | Timothy J. Dalton, Elbert E. Huang, Sampath Purushothaman, Carl Radens | 2014-09-09 |
| 8829986 | Structure and method for integrated synaptic element | Chandrasekhar Narayan, Gregory A. Northrop, Carl Radens, Brian C. Sapp | 2014-09-09 |
| 8809183 | Interconnect structure with a planar interface between a selective conductive cap and a dielectric cap layer | Griselda Bonilla, Elbert E. Huang, Satyanarayana V. Nitta, Shom Ponoth | 2014-08-19 |
| 8802990 | Self-aligned nano-scale device with parallel plate electrodes | Zhengwen Li, Kevin S. Petrarca, Roger A. Quon, Carl Radens, Brian C. Sapp | 2014-08-12 |
| 8792080 | Method and system to predict lithography focus error using simulated or measured topography | Brian C. Sapp, Choongyeun Cho, Laertis Economikos, Bernhard R. Liegl, Kevin S. Petrarca +1 more | 2014-07-29 |
| 8772941 | Circuit structure with low dielectric constant regions | Matthew E. Colburn, Louis C. Hsu, Wai-Kin Li | 2014-07-08 |
| 8692649 | Asset management infrastructure | Rainer Krause, Kevin S. Petrarca, Carl Radens, Brian C. Sapp | 2014-04-08 |
| 8685850 | System and method of plating conductive gate contacts on metal gates for self-aligned contact interconnections | John H. Zhang, Carl Radens, Yiheng Xu | 2014-04-01 |
| 8680577 | Recessed gate field effect transistor | John H. Zhang, Carl Radens, Yiheng Xu | 2014-03-25 |
| 8665575 | Solar module with overheat protection | Harold J. Hovel, Rainer Krause, Zhengwen Li, Kevin S. Petrarca, Gerd Pfeiffer +3 more | 2014-03-04 |
| 8642252 | Methods for fabrication of an air gap-containing interconnect structure | Maxime Darnon, Satyanarayana V. Nitta, Anthony D. Lisi, Qinghuang Lin | 2014-02-04 |
| 8629561 | Air gap-containing interconnect structure having photo-patternable low k material | Maxime Darnon, Qinghuang Lin, Anthony D. Lisi, Satyanarayana V. Nitta | 2014-01-14 |
| 8614115 | Photovoltaic solar cell device manufacture | Harold J. Hovel, Rainer Krause, Kevin S. Petrarca, Gerd Pfeiffer, Kevin M. Prettyman +2 more | 2013-12-24 |
| 8574950 | Electrically contactable grids manufacture | Rainer Krause, Zhengwen Li, Kevin S. Petrarca, Roger A. Quon, Carl Radens +1 more | 2013-11-05 |
| 8535970 | Manufacturing process for making photovoltaic solar cells | Ranier Krauser, Kevin M. Prettyman, Brian C. Sapp, Kevin S. Petrarca, Harold J. Hovel +3 more | 2013-09-17 |
| 8512849 | Corrugated interfaces for multilayered interconnects | Timothy J. Dalton, Elbert E. Huang, Sampath Purushothaman, Carl Radens | 2013-08-20 |
| 8486751 | Method of manufacturing a photovoltaic cell | Harold J. Hovel, Rainer Krause, Kevin S. Petrarca, Gerd Pfeiffer, Kevin M. Prettyman +1 more | 2013-07-16 |
| 8476530 | Self-aligned nano-scale device with parallel plate electrodes | Zhengwen Li, Kevin S. Petrarca, Roger A. Quon, Carl Radens, Brian C. Sapp | 2013-07-02 |
| 8455768 | Back-end-of-line planar resistor | Roger A. Booth, Jr. | 2013-06-04 |
| 8367544 | Self-aligned patterned etch stop layers for semiconductor devices | Kangguo Cheng, Johnathan E. Faltermeier, Stephan Grunow, Kaushik A. Kumar, Kevin S. Petrarca | 2013-02-05 |