Issued Patents All Time
Showing 501–525 of 2,819 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10903337 | Air gap spacer with wrap-around etch stop layer under gate spacer | Chen Zhang, Xin Miao, Wenyu Xu, Peng Xu | 2021-01-26 |
| 10903332 | Fully depleted SOI transistor with a buried ferroelectric layer in back-gate | Shawn P. Fetterolf, Terence B. Hook | 2021-01-26 |
| 10903331 | Positioning air-gap spacers in a transistor for improved control of parasitic capacitance | Nicolas Loubet, Wenyu Xu, Julien Frougier | 2021-01-26 |
| 10903317 | Gate-all-around field effect transistors with robust inner spacers and methods | Julien Frougier, Ruilong Xie, Chanro Park | 2021-01-26 |
| 10903273 | Phase change memory with gradual conductance change | — | 2021-01-26 |
| 10903212 | Fin field effect transistor devices with modified spacer and gate dielectric thicknesses | Xin Miao, Wenyu Xu, Chen Zhang | 2021-01-26 |
| 10903210 | Sub-fin doped bulk fin field effect transistor (FinFET), Integrated Circuit (IC) and method of manufacture | Karthik Balakrishnan, Pouya Hashemi, Alexander Reznicek | 2021-01-26 |
| 10903208 | Distributed decoupling capacitor | Ali Khakifirooz, Darsen D. Lu, Ghavam G. Shahidi | 2021-01-26 |
| 10903123 | High threshold voltage FET with the same fin height as regular threshold voltage vertical FET | Xin Miao, Chen Zhang, Wenyu Xu | 2021-01-26 |
| 10902910 | Phase change memory (PCM) with gradual reset characteristics | Xin Miao, Chen Zhang, Wenyu Xu | 2021-01-26 |
| 10900906 | Surface enhanced Raman scattering substrate | Juntao Li, Ruilong Xie, Chanro Park | 2021-01-26 |
| 10896976 | Embedded source/drain structure for tall FinFet and method of formation | Veeraraghavan S. Basker, Ali Khakifirooz, Henry K. Utomo, Reinaldo Vega | 2021-01-19 |
| 10896854 | Forming fins utilizing alternating pattern of spacers | Peng Xu | 2021-01-19 |
| 10896851 | Vertically stacked transistors | Tenko Yamahita, Chun Wing Yeung, Chen Zhang | 2021-01-19 |
| 10896845 | Airgap vertical transistor without structural collapse | Chanro Park, Juntao Li, Ruilong Xie | 2021-01-19 |
| 10892195 | Method and structure for forming a vertical field-effect transistor using a replacement metal gate process | Choonghyun Lee, Kisik Choi | 2021-01-12 |
| 10890560 | Forming nanoscale pores in a semiconductor structure utilizing nanotubes as a sacrificial template | Juntao Li, Peng Xu, Zhenxing Bi | 2021-01-12 |
| 10892328 | Source/drain extension regions and air spacers for nanosheet field-effect transistor structures | Yi Song, Zhenxing Bi, Chi-Chun Liu | 2021-01-12 |
| 10892325 | Vertical field effect transistor with reduced gate to source/drain capacitance | Juntao Li, Choonghyun Lee, Peng Xu | 2021-01-12 |
| 10892364 | Dielectric isolated fin with improved fin profile | Bruce B. Doris, Darsen D. Lu, Ali Khakifirooz, Kern Rim | 2021-01-12 |
| 10892324 | Vertical field effect transistor with reduced gate to source/drain capacitance | Juntao Li, Choonghyun Lee, Peng Xu | 2021-01-12 |
| 10892368 | Nanosheet transistor having abrupt junctions between the channel nanosheets and the source/drain extension regions | Choonghyun Lee, Juntao Li, Shogo Mochizuki | 2021-01-12 |
| 10886391 | Single-electron transistor with wrap-around gate | Xin Miao, Wenyu Xu, Chen Zhang | 2021-01-05 |
| 10886385 | Semiconductor structures having increased channel strain using fin release in gate regions | Bruce B. Doris, Ali Khakifirooz, Darsen D. Lu, Alexander Reznicek, Kern Rim | 2021-01-05 |
| 10886384 | Fabrication of a vertical fin field effect transistor (vertical finFET) with a self-aligned gate and fin edges | Xin Miao, Wenyu Xu, Chen Zhang | 2021-01-05 |