Issued Patents All Time
Showing 51–75 of 78 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9917196 | Semiconductor device and method of forming the semiconductor device | Marc A. Bergendahl, Fee Li Lie, Eric R. Miller, Robert R. Robison, John R. Sporre +1 more | 2018-03-13 |
| 9881937 | Preventing strained fin relaxation | Kangguo Cheng, Bruce B. Doris, Hong He, Sivananda K. Kanakasabapathy, Juntao Li +3 more | 2018-01-30 |
| 9876074 | Structure and process to tuck fin tips self-aligned to gates | Bruce B. Doris, Hong He, Sivananda K. Kanakasabapathy, Fee Li Lie, Derrick Liu +2 more | 2018-01-23 |
| 9805991 | Strained finFET device fabrication | Bruce B. Doris, Hong He, Sivananda K. Kanakasabapathy, Fee Li Lie, Stuart A. Sieg | 2017-10-31 |
| 9805992 | Strained finFET device fabrication | Bruce B. Doris, Hong He, Sivananda K. Kanakasabapathy, Fee Li Lie, Stuart A. Sieg | 2017-10-31 |
| 9793402 | Retaining strain in finFET devices | Bruce B. Doris, Fee Li Lie, Junli Wang | 2017-10-17 |
| 9741856 | Stress retention in fins of fin field-effect transistors | Sivananda K. Kanakasabapathy, Juntao Li, Fee Li Lie, Stuart A. Sieg, John R. Sporre | 2017-08-22 |
| 9735275 | Channel replacement and bimodal doping scheme for bulk finFET threshold voltage modulation with reduced performance penalty | Robert R. Robison, Reinaldo Vega | 2017-08-15 |
| 9728642 | Retaining strain in finFET devices | Bruce B. Doris, Fee Li Lie, Junli Wang | 2017-08-08 |
| 9721848 | Cutting fins and gates in CMOS devices | Huiming Bu, Kangguo Cheng, Andrew M. Greene, Dechao Guo, Sivananda K. Kanakasabapathy +6 more | 2017-08-01 |
| 9711507 | Separate N and P fin etching for reduced CMOS device leakage | Isabel Cristina Chu, Lawrence A. Clevenger, Leigh Anne H. Clevenger, Mona A. Ebrish, Fee Li Lie +3 more | 2017-07-18 |
| 9640640 | FinFET device with channel strain | Bruce B. Doris, Hong He, Sivananda K. Kanakasabapathy, Fee Li Lie | 2017-05-02 |
| 9576979 | Preventing strained fin relaxation by sealing fin ends | Kangguo Cheng, Bruce B. Doris, Hong He, Sivananda K. Kanakasabapathy, Juntao Li +3 more | 2017-02-21 |
| 9515141 | FinFET device with channel strain | Bruce B. Doris, Hong He, Sivananda K. Kanakasabapathy, Fee Li Lie | 2016-12-06 |
| 9502411 | Strained finFET device fabrication | Bruce B. Doris, Hong He, Sivananda K. Kanakasabapathy, Fee Li Lie, Stuart A. Sieg | 2016-11-22 |
| 9496371 | Channel protection during fin fabrication | Russell H. Arndt, Hong He, Fee Li Lie, Muthumanickam Sankarapandian | 2016-11-15 |
| 9431514 | FinFET device having a high germanium content fin structure and method of making same | Qing Liu, Bruce B. Doris | 2016-08-30 |
| 9362280 | Semiconductor devices with different dielectric thicknesses | Mark D. Hall, Srikanth B. Samavedam | 2016-06-07 |
| 9331148 | FinFET device with channel strain | Bruce B. Doris, Hong He, Sivananda K. Kanakasabapathy, Fee Li Lie | 2016-05-03 |
| RE45955 | Dual high-K oxides with SiGe channel | Tien Ying Luo, Daniel Tekleab | 2016-03-29 |
| 9287264 | Epitaxially grown silicon germanium channel FinFET with silicon underlayer | Kangguo Cheng, Eric C. Harley, Judson R. Holt, Yue Ke, Derrick Liu +4 more | 2016-03-15 |
| 8460996 | Semiconductor devices with different dielectric thicknesses | Mark D. Hall, Srikanth B. Samavedam | 2013-06-11 |
| 8017469 | Dual high-k oxides with sige channel | Tien Ying Luo, Daniel G. Tekleab | 2011-09-13 |
| 7790528 | Dual substrate orientation or bulk on SOI integrations using oxidation for silicon epitaxy spacer formation | Gregory S. Spencer, John M. Grant | 2010-09-07 |
| 7749829 | Step height reduction between SOI and EPI for DSO and BOS integration | Debby Eades, Gregory S. Spencer, Ted R. White | 2010-07-06 |