Issued Patents All Time
Showing 276–300 of 401 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10586872 | Formation of wrap-around-contact to reduce contact resistivity | Adra Carr, Jingyun Zhang, Takashi Ando, Pouya Hashemi | 2020-03-10 |
| 10580881 | Approach to control over-etching of bottom spacers in vertical fin field effect transistor devices | Ruqiang Bao, Hemanth Jagannathan, Paul C. Jamison | 2020-03-03 |
| 10580829 | Fabricating a vertical ReRAM array structure having reduced metal resistance | Takashi Ando, Pouya Hashemi | 2020-03-03 |
| 10580703 | Multivalent oxide cap for multiple work function gate stacks on high mobility channel materials | Takashi Ando, Jingyun Zhang, Pouya Hashemi | 2020-03-03 |
| 10573723 | Vertical transport FETs with asymmetric channel profiles using dipole layers | Takashi Ando, Sanghoon Shin, Jingyun Zhang, Pouya Hashemi, Alexander Reznicek | 2020-02-25 |
| 10566435 | Gate stack quality for gate-all-around field-effect transistors | Jingyun Zhang, Takashi Ando | 2020-02-18 |
| 10566251 | Techniques for forming vertical transport FET | Kangguo Cheng, Juntao Li | 2020-02-18 |
| 10559671 | Vertical transport field-effect transistor including air-gap top spacer | Hemanth Jagannathan, Alexander Reznicek, Christopher J. Waskiewicz | 2020-02-11 |
| 10559692 | Nanosheet substrate isolation scheme by lattice matched wide bandgap semiconductor | Alexander Reznicek, Xin Miao, Jingyun Zhang | 2020-02-11 |
| 10559685 | Vertical field effect transistor with reduced external resistance | Juntao Li, Kangguo Cheng, Peng Xu | 2020-02-11 |
| 10559676 | Vertical FET with differential top spacer | Takashi Ando, Jingyun Zhang, Pouya Hashemi | 2020-02-11 |
| 10559675 | Stacked silicon nanotubes | Juntao Li, Kangguo Cheng, Peng Xu | 2020-02-11 |
| 10559672 | Vertical transport field-effect transistor including dual layer top spacer | Hemanth Jagannathan, Alexander Reznicek, Christopher J. Waskiewicz | 2020-02-11 |
| 10559566 | Reduction of multi-threshold voltage patterning damage in nanosheet device structure | Kangguo Cheng, Juntao Li, Shogo Mochizuki | 2020-02-11 |
| 10553495 | Nanosheet transistors with different gate dielectrics and workfunction metals | Kangguo Cheng, Juntao Li, Peng Xu | 2020-02-04 |
| 10553696 | Full air-gap spacers for gate-all-around nanosheet field effect transistors | Takashi Ando, Pouya Hashemi, Alexander Reznicek, Jingyun Zhang | 2020-02-04 |
| 10553679 | Formation of self-limited inner spacer for gate-all-around nanosheet FET | Jingyun Zhang, Takashi Ando, Alexander Reznicek, Pouya Hashemi | 2020-02-04 |
| 10553678 | Vertically stacked dual channel nanosheet devices | Jingyun Zhang, Pouya Hashemi, Takashi Ando, Alexander Reznicek | 2020-02-04 |
| 10546925 | Vertically stacked nFET and pFET with dual work function | Alexander Reznicek, Takashi Ando, Jingyun Zhang, Pouya Hashemi | 2020-01-28 |
| 10541329 | Boosted vertical field-effect transistor | Injo Ok, Soon-Cheon Seo, Seyoung Kim | 2020-01-21 |
| 10541239 | Semiconductor device and method of forming the semiconductor device | Robin Hsin Kuo Chao, Hemanth Jagannathan, Chun Wing Yeung, Jingyun Zhang | 2020-01-21 |
| 10535754 | Method and structure for forming a vertical field-effect transistor | Peng Xu, Kangguo Cheng, Juntao Li | 2020-01-14 |
| 10535570 | Cointegration of III-V channels and germanium channels for vertical field effect transistors | Takashi Ando, Pouya Hashemi | 2020-01-14 |
| 10535733 | Method of forming a nanosheet transistor | Kangguo Cheng, Juntao Li, Peng Xu | 2020-01-14 |
| 10535567 | Methods and structures for forming uniform fins when using hardmask patterns | Peng Xu, Kangguo Cheng, Yann Mignot | 2020-01-14 |