Issued Patents All Time
Showing 226–250 of 401 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10707304 | Vertically stacked nFET and pFET with dual work function | Alexander Reznicek, Takashi Ando, Jingyun Zhang, Pouya Hashemi | 2020-07-07 |
| 10707329 | Vertical fin field effect transistor device with reduced gate variation and reduced capacitance | Juntao Li, Kangguo Cheng, Shogo Mochizuki | 2020-07-07 |
| 10700129 | Vertical array of resistive switching devices having a tunable oxygen vacancy concentration | Takashi Ando | 2020-06-30 |
| 10700064 | Multi-threshold voltage gate-all-around field-effect transistor devices with common gates | Jingyun Zhang, Takashi Ando | 2020-06-30 |
| 10699967 | Co-integration of high carrier mobility PFET and NFET devices on the same substrate using low temperature condensation | Takashi Ando, Pouya Hashemi | 2020-06-30 |
| 10700062 | Vertical transport field-effect transistors with uniform threshold voltage | Kangguo Cheng, Juntao Li, Shogo Mochizuki | 2020-06-30 |
| 10693059 | MTJ stack etch using IBE to achieve vertical profile | Soon-Cheon Seo, Kisup Chung, Injo Ok, Seyoung Kim | 2020-06-23 |
| 10689245 | Vertically stacked nanofluidic channel array | Juntao Li, Kangguo Cheng, Peng Xu | 2020-06-23 |
| 10692866 | Co-integrated channel and gate formation scheme for nanosheet transistors having separately tuned threshold voltages | Takashi Ando, Jingyun Zhang, Pouya Hashemi, Alexander Reznicek | 2020-06-23 |
| 10692873 | Gate formation scheme for nanosheet transistors having different work function metals and different nanosheet width dimensions | Takashi Ando, Ruqiang Bao, Pouya Hashemi | 2020-06-23 |
| 10686057 | Vertical transport FET devices having a sacrificial doped layer | Kangguo Cheng, Juntao Li, Shogo Mochizuki | 2020-06-16 |
| 10686076 | Germanium condensation for replacement metal gate devices with silicon germanium channel | Takashi Ando, Pouya Hashemi | 2020-06-16 |
| 10680063 | Method of manufacturing stacked SiGe nanotubes | Juntao Li, Kangguo Cheng | 2020-06-09 |
| 10680083 | Oxide isolated fin-type field-effect transistors | Ruqiang Bao, Hemanth Jagannathan, Paul C. Jamison | 2020-06-09 |
| 10680102 | Reduction of top source/drain external resistance and parasitic capacitance in vertical transistors | Kangguo Cheng, Juntao Li, Shogo Mochizuki | 2020-06-09 |
| 10672643 | Reducing off-state leakage current in Si/SiGe dual channel CMOS | Injo Ok, Soon-Cheon Seo, Seyoung Kim | 2020-06-02 |
| 10672670 | Replacement metal gate process for vertical transport field-effect transistors with multiple threshold voltages | Ruqiang Bao, Hemanth Jagannathan, Brent A. Anderson | 2020-06-02 |
| 10672872 | Self-aligned base contacts for vertical fin-type bipolar junction transistors | Injo Ok, Soon-Cheon Seo, Seyoung Kim | 2020-06-02 |
| 10672891 | Stacked gate all around MOSFET with symmetric inner spacer formed via sacrificial pure Si anchors | Pouya Hashemi, Takashi Ando, Jingyun Zhang | 2020-06-02 |
| 10672905 | Replacement metal gate process for vertical transport field-effect transistor with self-aligned shared contacts | Ruqiang Bao, Brent A. Anderson, Hemanth Jagannathan | 2020-06-02 |
| 10665511 | Self-limiting liners for increasing contact trench volume in N-type and P-type transistors | Kangguo Cheng, Juntao Li, Peng Xu | 2020-05-26 |
| 10665698 | Reducing gate-induced-drain-leakage current in a transistor by forming an enhanced band gap layer at the channel-to-drain interface | Kangguo Cheng, Juntao Li, Shogo Mochizuki | 2020-05-26 |
| 10665714 | Vertical transistors with various gate lengths | Juntao Li, Kangguo Cheng, Shogo Mochizuki | 2020-05-26 |
| 10658462 | Vertically stacked dual channel nanosheet devices | Jingyun Zhang, Pouya Hashemi, Takashi Ando, Alexander Reznicek | 2020-05-19 |
| 10658299 | Replacement metal gate processes for vertical transport field-effect transistor | Chun Wing Yeung, Ruqiang Bao, Hemanth Jagannathan | 2020-05-19 |