Issued Patents All Time
Showing 551–575 of 888 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9281211 | Nanoscale interconnect structure | Stephan A. Cohen, Eric G. Liniger | 2016-03-08 |
| 9276013 | Integrated formation of Si and SiGe fins | Bruce B. Doris, Hong He, Juntao Li, Junli Wang | 2016-03-01 |
| 9269621 | Dual damascene dual alignment interconnect scheme | Steven J. Holmes, David V. Horak, Charles W. Koburger, III, Shom Ponoth | 2016-02-23 |
| 9263290 | Sub-lithographic semiconductor structures with non-constant pitch | Marc A. Bergendahl, David V. Horak, Charles W. Koburger, III, Shom Ponoth | 2016-02-16 |
| 9263388 | Overlay-tolerant via mask and reactive ion etch (RIE) technique | Steven J. Holmes, David V. Horak, Charles W. Koburger, III, Shom Ponoth | 2016-02-16 |
| 9245794 | Formation of alloy liner by reaction of diffusion barrier and seed layer for interconnect application | Daniel C. Edelstein, Takeshi Nogami | 2016-01-26 |
| 9224640 | Method to improve fine Cu line reliability in an integrated circuit device | Chad M. Burke, Baozhen Li, Keith Kwong Hon Wong | 2015-12-29 |
| 9202879 | Mask free protection of work function material portions in wide replacement gate electrodes | Charles W. Koburger, III, Marc A. Bergendahl, David V. Horak, Shom Ponoth | 2015-12-01 |
| 9202749 | Process methods for advanced interconnect patterning | Shom Ponoth | 2015-12-01 |
| 9177820 | Sub-lithographic semiconductor structures with non-constant pitch | Marc A. Bergendahl, David V. Horak, Charles W. Koburger, III, Shom Ponoth | 2015-11-03 |
| 9157136 | Multi-element alloy material and method of manufacturing the same | Yu-Hsien Chou | 2015-10-13 |
| 9159653 | Copper interconnect structures and methods of making same | Marc A. Bergendahl, David V. Horak, Baozhen Li, Shom Ponoth | 2015-10-13 |
| 9141749 | Interconnect structures and methods for back end of the line integration | David V. Horak, Charles W. Koburger, III, Shom Ponoth | 2015-09-22 |
| 9129964 | Programmable electrical fuse | Jason Coyner, Baozhen Li, Keith Kwong Hon Wong | 2015-09-08 |
| 9105641 | Profile control in interconnect structures | Shyng-Tsong Chen, Samuel S. Choi, Steven J. Holmes, David V. Horak, Charles W. Koburger, III +4 more | 2015-08-11 |
| 9099493 | Semiconductor device with raised source/drain and replacement metal gate | Kangguo Cheng, Junli Wang, Keith Kwong Hon Wong | 2015-08-04 |
| 9077505 | MIPI signal receiving apparatus and method | Wei-Ying Tu, Yu-Hsun Peng, Feng-Jung Kuo, Chien-Yu Chen | 2015-07-07 |
| 9059254 | Overlay-tolerant via mask and reactive ion etch (RIE) technique | Steven J. Holmes, David V. Horak, Charles W. Koburger, III, Shom Ponoth | 2015-06-16 |
| 9058887 | Reprogrammable electrical fuse | Louis C. Hsu, Conal E. Murray, Chandrasekhar Narayan | 2015-06-16 |
| 9059171 | Electrical fuse and method of making | Haining Yang | 2015-06-16 |
| 9059217 | FET semiconductor device with low resistance and enhanced metal fill | Kangguo Cheng, Junli Wang, Keith Kwong Hon Wong | 2015-06-16 |
| 9059257 | Self-aligned vias formed using sacrificial metal caps | Juntao Li, Yunpeng Yin | 2015-06-16 |
| 9059270 | Replacement gate MOSFET with raised source and drain | Shom Ponoth, David V. Horak | 2015-06-16 |
| 9048296 | Method to fabricate copper wiring structures and structures formed thereby | Fenton R. McFeely | 2015-06-02 |
| 9029208 | Semiconductor device with replacement metal gate and method for selective deposition of material for replacement metal gate | Kangguo Cheng, Junli Wang, Keith Kwong Hon Wong | 2015-05-12 |