Issued Patents All Time
Showing 526–550 of 888 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9570389 | Interconnect structure | Dinesh A. Badami, Baozhen Li, Wen Liu | 2017-02-14 |
| 9564310 | Metal-insulator-metal capacitor fabrication with unitary sputtering process | Praneet Adusumilli, Alexander Reznicek, Oscar van der Straten | 2017-02-07 |
| 9558999 | Ultra-thin metal wires formed through selective deposition | Juntao Li, Yunpeng Yin | 2017-01-31 |
| 9553044 | Electrically conductive interconnect including via having increased contact surface area | Hsueh-Chung Chen, James J. Demarest, Sean Teehan | 2017-01-24 |
| 9548270 | Electrical fuse with metal line migration | Baozhen Li, Yan Li, Keith Kwong Hon Wong | 2017-01-17 |
| 9540716 | Composite powder of carbide/blending metal | Chi-San Chen, Lik-Hang Chau, Ching-Chang Hsieh, Yen-Yu HOU | 2017-01-10 |
| 9536986 | Enriched, high mobility strained fin having bottom dielectric isolation | Bruce B. Doris, Hong He, Juntao Li, Junli Wang | 2017-01-03 |
| 9536780 | Method and apparatus for single chamber treatment | Daniel C. Edelstein | 2017-01-03 |
| 9520357 | Anti-fuse structure and method for manufacturing the same | Hong He, Juntao Li, Junli Wang | 2016-12-13 |
| 9514981 | Interconnect structure | Dinesh A. Badami, Baozhen Li, Wen Liu | 2016-12-06 |
| 9496239 | Nitride-enriched oxide-to-oxide 3D wafer bonding | Daniel C. Edelstein | 2016-11-15 |
| 9484254 | Size-filtered multimetal structures | David V. Horak, Charles W. Koburger, III, Shom Ponoth | 2016-11-01 |
| 9484201 | Epitaxial silicon germanium fin formation using sacrificial silicon fin templates | Hong He, Juntao Li, Junli Wang | 2016-11-01 |
| 9455350 | Transistor device structure that includes polycrystalline semiconductor thin film that has large grain size | Jia-Min Shieh, Wen-Hsien Huang, Chang-Hong Shen, Tung-Ying Hsieh | 2016-09-27 |
| 9437714 | Selective gate contact fill metallization | Praneet Adusumilli, Alexander Reznicek, Oscar van der Straten | 2016-09-06 |
| 9406617 | Structure and process for W contacts | Daniel C. Edelstein, Baozhen Li | 2016-08-02 |
| 9392690 | Method and structure to improve the conductivity of narrow copper filled vias | Fenton R. McFeely | 2016-07-12 |
| 9385025 | E-fuses containing at least one underlying tungsten contact for programming | Rajiv V. Joshi | 2016-07-05 |
| 9379198 | Integrated circuit structure having selectively formed metal cap | David V. Horak, Charles W. Koburger, III, Shom Ponoth | 2016-06-28 |
| 9379221 | Bottom-up metal gate formation on replacement metal gate finFET devices | Hong He, Juntao Li, Junli Wang | 2016-06-28 |
| 9349691 | Semiconductor device with reduced via resistance | Conal E. Murray | 2016-05-24 |
| 9343407 | Method to fabricate copper wiring structures and structures formed thereby | Fenton R. McFeely | 2016-05-17 |
| 9331073 | Epitaxially grown quantum well finFETs for enhanced pFET performance | Marc A. Bergendahl, James J. Demarest, Hong He, Seth L. Knupp, Raghavasimhan Sreenivasan +2 more | 2016-05-03 |
| 9312203 | Dual damascene structure with liner | Baozhen Li | 2016-04-12 |
| 9281305 | Transistor device structure | Jia-Min Shieh, Wen-Hsien Huang, Tung-Ying Hsieh, Chang-Hong Shen, Szu-Hung Chen | 2016-03-08 |