BB

Brian D. Barrick

IBM: 88 patents #717 of 70,183Top 2%
KT Kabushiki Kaisha Toshiba: 2 patents #9,982 of 21,451Top 50%
📍 Pflugerville, TX: #5 of 621 inventorsTop 1%
🗺 Texas: #566 of 125,132 inventorsTop 1%
Overall (All Time): #18,760 of 4,157,543Top 1%
88
Patents All Time

Issued Patents All Time

Showing 26–50 of 88 patents

Patent #TitleCo-InventorsDate
10963380 Cache miss thread balancing Gregory W. Alexander, Thomas W. Fox, Christian Jacobi, Anthony Saporito, Somin Song +1 more 2021-03-30
10956158 System and handling of register data in processors Steven J. Battle, Khandker N. Adeeb, Joshua W. Bowman, Thao T. Doan, Susan E. Eisen +2 more 2021-03-23
10949213 Logical register recovery within a processor Steven J. Battle, Salma Ayub, Joshua W. Bowman, Susan E. Eisen, Brandon Goddard +2 more 2021-03-16
10909034 Issue queue snooping for asynchronous flush and restore of distributed history buffer David R. Terry, Dung Q. Nguyen, Brian W. Thompto, Joshua W. Bowman, Steven J. Battle +2 more 2021-02-02
10884752 Slice-based allocation history buffer Gregory W. Alexander, Dung Q. Nguyen 2021-01-05
10877763 Dispatching, allocating, and deallocating instructions with real/virtual and region tags in a queue in a processor Bryan Lloyd, Kurt A. Feiste, Hung Q. Le, Dung Q. Nguyen, Kenneth L. Ward 2020-12-29
10740140 Flush-recovery bandwidth in a processor Steven J. Battle, Khandker N. Adeeb, Joshua W. Bowman, Susan E. Eisen, Brandon Goddard +2 more 2020-08-11
10719056 Merging status and control data in a reservation station Joshua W. Bowman, Jeffrey C. Brownscheidle, Sundeep Chadha, Michael J. Genden, Dhivya Jeganathan +2 more 2020-07-21
10592422 Data-less history buffer with banked restore ports in a register mapper Gregory W. Alexander, Dung Q. Nguyen 2020-03-17
10545765 Multi-level history buffer for transaction memory in a microprocessor Steven J. Battle, Joshua W. Bowman, Hung Q. Le, Dung Q. Nguyen, David R. Terry +1 more 2020-01-28
10379867 Asynchronous flush and restore of distributed history buffer David R. Terry, Dung Q. Nguyen, Brian W. Thompto, Joshua W. Bowman, Steven J. Battle +2 more 2019-08-13
10353817 Cache miss thread balancing Gregory W. Alexander, Thomas W. Fox, Christian Jacobi, Anthony Saporito, Somin Song +1 more 2019-07-16
10318356 Operation of a multi-slice processor implementing a hardware level transfer of an execution thread James Wilson Bishop, Marcy E. Byers, Sundeep Chadha, Cliff Kucharski, Dung Q. Nguyen +2 more 2019-06-11
10303569 Simplified processor sparing Gregory W. Alexander, Shimon Ben-Yehuda, Ophir Erez, Anthony Saporito, Timothy J. Slegel 2019-05-28
10282207 Multi-slice processor issue of a dependent instruction in an issue queue based on issue of a producer instruction Sundeep Chadha, Michael J. Genden, Jerry Y. Lu, Dung Q. Nguyen, Nasrin Sultana +2 more 2019-05-07
10268482 Multi-slice processor issue of a dependent instruction in an issue queue based on issue of a producer instruction Sundeep Chadha, Michael J. Genden, Jerry Y. Lu, Dung Q. Nguyen, Nasrin Sultana +2 more 2019-04-23
10248426 Direct register restore mechanism for distributed history buffers Steven J. Battle, Joshua W. Bowman, Christopher M. Mueller, Dung Q. Nguyen, David R. Terry +2 more 2019-04-02
10248421 Operation of a multi-slice processor with reduced flush and restore latency Salma Ayub, Joshua W. Bowman, Sundeep Chadha, Cliff Kucharski, Dung Q. Nguyen +2 more 2019-04-02
10241790 Operation of a multi-slice processor with reduced flush and restore latency Salma Ayub, Joshua W. Bowman, Sundeep Chadha, Cliff Kucharski, Dung Q. Nguyen +2 more 2019-03-26
10223196 ECC scrubbing method in a multi-slice microprocessor James Wilson Bishop, Maarten J. Boersma, Marcy E. Byers, Sundeep Chadha, Jentje Leenstra +2 more 2019-03-05
10140127 Operation of a multi-slice processor with selective producer instruction types Sundeep Chadha, Maureen A. Delaney, Thao T. Doan, Michael J. Genden, Rokesh Jayasundar +2 more 2018-11-27
10127047 Operation of a multi-slice processor with selective producer instruction types Sundeep Chadha, Maureen A. Delaney, Thao T. Doan, Michael J. Genden, Rokesh Jayasundar +2 more 2018-11-13
10007526 Freelist based global completion table having both thread-specific and global completion table identifiers Gregory W. Alexander 2018-06-26
10007525 Freelist based global completion table having both thread-specific and global completion table identifiers Gregory W. Alexander 2018-06-26
9971601 Dynamic assignment across dispatch pipes of source ports to be used to obtain indication of physical registers Gregory W. Alexander, Fadi Y. Busaba, Wen H. Li, Edward T. Malley 2018-05-15