Issued Patents All Time
Showing 51–75 of 188 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9483180 | Memory-area property storage including data fetch width indicator | Michael K. Gschwind, Jose E. Moreira | 2016-11-01 |
| 9483179 | Memory-area property storage including data fetch width indicator | Michael K. Gschwind, Jose E. Moreira | 2016-11-01 |
| 9424194 | Probabilistic associative cache | Bulent Abali, John Steven Dodson, Moinuddin K. Qureshi | 2016-08-23 |
| 9256540 | Techniques for cache injection in a processor system using a cache injection instruction | Lakshminarayana B. Arimilli, Ravi Kumar Arimilli | 2016-02-09 |
| 9110885 | Techniques for cache injection in a processor system | Lakshminarayana B. Arimilli, Ravi Kumar Arimilli | 2015-08-18 |
| 9037837 | Hardware assist thread for increasing code parallelism | Ronald P. Hall, Hung Q. Le, Raul E. Silvera | 2015-05-19 |
| 9003417 | Processor with resource usage counters for per-thread accounting | William J. Armstrong, Michael Stephen Floyd, Ronald Nick Kalla, Larry Scott Leitner | 2015-04-07 |
| 8949837 | Assist thread for injecting cache memory in a microprocessor | Patrick J. Bohrer, Orran Krieger, Ramakrishnan Rajamony, Michael Rosenfield, Hazim Shafi +1 more | 2015-02-03 |
| 8904151 | Method and apparatus for the dynamic identification and merging of instructions for execution on a wide datapath | Michael K. Gschwind | 2014-12-02 |
| 8806177 | Prefetch engine based translation prefetching | Orran Krieger, Robert B. Tremaine, Robert W. Wisniewski | 2014-08-12 |
| 8775778 | Use of a helper thread to asynchronously compute incoming data | Ravi Kumar Arimilli, Juan C. Rubio | 2014-07-08 |
| 8707016 | Thread partitioning in a multi-core environment | Ravi Kumar Arimilli, Juan C. Rubio | 2014-04-22 |
| 8612730 | Hardware assist thread for dynamic performance profiling | Ronald P. Hall, Venkat R. Indukuru, Alexander Erik Mericas, Zhong Liang Wang | 2013-12-17 |
| 8601241 | General purpose register cloning | Ravi Kumar Arimilli, Juan C. Rubio | 2013-12-03 |
| 8595443 | Varying a data prefetch size based upon data usage | Ravi Kumar Arimilli, Gheorghe C. Cascaval, William E. Speight, Lixin Zhang | 2013-11-26 |
| 8495649 | Scheduling threads having complementary functional unit usage on SMT processors | Orran Krieger, Bryan S. Rosenburg, Robert B. Tremaine, Robert W. Wisniewski | 2013-07-23 |
| 8458709 | Dynamic switching of multithreaded processor between single threaded and simultaneous multithreaded modes | William J. Armstrong, Bruce Mealey, Naresh Nayar | 2013-06-04 |
| 8458439 | Block driven computation using a caching policy specified in an operand data structure | Ravi Kumar Arimilli | 2013-06-04 |
| 8443146 | Techniques for cache injection in a processor system responsive to a specific instruction sequence | Lakshminarayana B. Arimilli, Ravi Kumar Arimilli | 2013-05-14 |
| 8429349 | Techniques for cache injection in a processor system with replacement policy position modification | Lakshminarayana B. Arimilli, Ravi Kumar Arimilli | 2013-04-23 |
| 8423750 | Hardware assist thread for increasing code parallelism | Ronald P. Hall, Hung Q. Le, Raul E. Silvera | 2013-04-16 |
| 8418180 | Thread priority method for ensuring processing fairness in simultaneous multi-threading microprocessors | James Wilson Bishop, Hung Q. Le, Dung Q. Nguyen, Brian W. Thompto, Raymond Cheung Yeung | 2013-04-09 |
| 8407680 | Operand data structure for block computation | Ravi Kumar Arimilli | 2013-03-26 |
| 8387065 | Speculative popcount data creation | Ravi Kumar Arimilli, Ronald Nick Kalla | 2013-02-26 |
| 8386753 | Completion arbitration for more than two threads based on resource limitations | Susan E. Eisen, Dung Q. Nguyen, Benjamin W. Stolt | 2013-02-26 |