Issued Patents All Time
Showing 51–75 of 102 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6124201 | Method for manufacturing semiconductors with self-aligning vias | Fei Wang, Mark S. Chang, Richard J. Huang, Angela T. Hui | 2000-09-26 |
| 6117763 | Method of manufacturing a semiconductor device with a low permittivity dielectric layer and contamination due to exposure to water | Charles E. May | 2000-09-12 |
| 6110829 | Ultra-low temperature Al fill for sub-0.25 .mu.m generation of ICs using an Al-Ge-Cu alloy | Paul R. Besser, Guarionex Morales | 2000-08-29 |
| 6096648 | Copper/low dielectric interconnect formation with reduced electromigration | Sergey Lopatin, Takeshi Nogami, Christy Mei-Chu Woo, Guarionex Morales | 2000-08-01 |
| 6083842 | Fabrication of a via plug having high aspect ratio with a diffusion barrier layer effectively surrounding the via plug | Sergey Lopatin | 2000-07-04 |
| 6056864 | Electropolishing copper film to enhance CMP throughput | — | 2000-05-02 |
| 6048802 | Selective nonconformal deposition for forming low dielectric insulation between certain conductive lines | Steven C. Avanzino, Darrell M. Erb, Rich Klein | 2000-04-11 |
| 6033982 | Scaled interconnect anodization for high frequency applications | Sergey Lopatin | 2000-03-07 |
| 5990557 | Bias plasma deposition for selective low dielectric insulation | Steven C. Avanzino, Darrell M. Erb, Rich Klein, Pervaiz Sultan | 1999-11-23 |
| 5972192 | Pulse electroplating copper or copper alloys | Valery M. Dubin, Chiu H. Ting | 1999-10-26 |
| 5968333 | Method of electroplating a copper or copper alloy interconnect | Takeshi Nogami, Valery M. Dubin | 1999-10-19 |
| 5970370 | Manufacturing capping layer for the fabrication of cobalt salicide structures | Paul R. Besser, Robert Chen | 1999-10-19 |
| 5965934 | Processing techniques for achieving production-worthy, low dielectric, low interconnect resistance and high performance ICS | Mark S. Chang | 1999-10-12 |
| 5955786 | Semiconductor device using uniform nonconformal deposition for forming low dielectric constant insulation between certain conductive lines | Steven C. Avanzino, Darrell M. Erb, Rich Klein | 1999-09-21 |
| 5861677 | Low RC interconnection | Lu You, Simon S. Chan, Richard J. Huang | 1999-01-19 |
| 5843836 | Tunneling technology for reducing intra-conductive layer capacitance | Simon S. Chan, Richard J. Huang | 1998-12-01 |
| 5837618 | Uniform nonconformal deposition for forming low dielectric constant insulation between certain conductive lines | Steven C. Avanzino, Darrell M. Erb | 1998-11-17 |
| 5814560 | Metallization sidewall passivation technology for deep sub-half micrometer IC applications | Simon S. Chan, Subhash Gupta | 1998-09-29 |
| 5789315 | Eliminating metal extrusions by controlling the liner deposition temperature | Paul R. Besser | 1998-08-04 |
| 5785236 | Advanced copper interconnect system that is compatible with existing IC wire bonding technology | Ming-Ren Lin | 1998-07-28 |
| 5776834 | Bias plasma deposition for selective low dielectric insulation | Steven C. Avanzino, Darrell M. Erb, Rich Klein, Pervaiz Sultan | 1998-07-07 |
| 5770519 | Copper reservoir for reducing electromigration effects associated with a conductive via in a semiconductor device | Richard K. Klein, Darrell M. Erb, Steven C. Avanzino, Scott Luning, Bryan Tracy +2 more | 1998-06-23 |
| 5760480 | Low RC interconnection | Lu You, Simon S. Chan, Richard J. Huang | 1998-06-02 |
| 5693566 | Layered low dielectric constant technology | — | 1997-12-02 |
| 5691573 | Composite insulation with a dielectric constant of less than 3 in a narrow space separating conductive lines | Steven C. Avanzino, Darrell M. Erb, Rich Klein | 1997-11-25 |