Issued Patents 2021
Showing 1–19 of 19 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11152489 | Additive core subtractive liner for metal cut etch processes | Ruqiang Bao, Kisup Chung, Sivananda K. Kanakasabapathy, David L. Rath, Indira Seshadri +1 more | 2021-10-19 |
| 11139372 | Dual step etch-back inner spacer formation | Yao Yao, Ruilong Xie, Veeraraghavan S. Basker | 2021-10-05 |
| 11133189 | Metal cut patterning and etching to minimize interlayer dielectric layer loss | Kisup Chung, Ekmini Anuja De Silva, Siva Kanakasabapathy, Indira Seshadri | 2021-09-28 |
| 11081568 | Protective bilayer inner spacer for nanosheet devices | Yao Yao, Ruilong Xie, Veeraraghavan S. Basker | 2021-08-03 |
| 11075281 | Additive core subtractive liner for metal cut etch processes | Ruqiang Bao, Kisup Chung, Sivananda K. Kanakasabapathy, David L. Rath, Indira Seshadri +1 more | 2021-07-27 |
| 11056399 | Source and drain EPI protective spacer during single diffusion break formation | Yao Yao, Veeraraghavan S. Basker, Kangguo Cheng, Zhenxing Bi, Ruilong Xie | 2021-07-06 |
| 11024536 | Contact interlayer dielectric replacement with improved SAC cap retention | Adra Carr, Vimal Kamineni, Ruilong Xie, Nigel G. Cave, Veeraraghavan S. Basker | 2021-06-01 |
| 11024715 | FinFET gate cut after dummy gate removal | John R. Sporre, Siva Kanakasabapathy, Jeffrey C. Shearer, Nicole Saulnier | 2021-06-01 |
| 11011417 | Method and structure of metal cut | Su Chen Fan, Ruilong Xie, Veeraraghavan S. Basker | 2021-05-18 |
| 11004944 | Gate cut device fabrication with extended height gates | Kangguo Cheng, John R. Sporre, Peng Xu | 2021-05-11 |
| 10998314 | Gate cut with integrated etch stop layer | Marc A. Bergendahl, Rajasekhar Venigalla | 2021-05-04 |
| 10985260 | Trench silicide contacts with high selectivity process | Balasubramanian Pranatharthiharan, Ruilong Xie | 2021-04-20 |
| 10985250 | Gate cut device fabrication with extended height gates | Kangguo Cheng, John R. Sporre, Peng Xu | 2021-04-20 |
| 10985076 | Single metallization scheme for gate, source, and drain contact integration | Victor Chan, Gangadhara Raja Muthinti | 2021-04-20 |
| 10957544 | Gate cut with high selectivity to preserve interlevel dielectric layer | Ryan O. Jung, Ruilong Xie | 2021-03-23 |
| 10943990 | Gate contact over active enabled by alternative spacer scheme and claw-shaped cap | Victor Chan, Gangadhara Raja Muthinti, Veeraraghavan S. Basker, Junli Wang, Kisik Choi +1 more | 2021-03-09 |
| 10923401 | Gate cut critical dimension shrink and active gate defect healing using selective deposition | Marc A. Bergendahl, Ekmini Anuja De Silva, Alex Joseph Varghese, Yann Mignot, Matthew T. Shoudy +2 more | 2021-02-16 |
| 10903111 | Semiconductor device with linerless contacts | Alex Joseph Varghese, Marc A. Bergendahl, Dallas Lea, Matthew T. Shoudy, Yann Mignot +2 more | 2021-01-26 |
| 10892181 | Semiconductor device with mitigated local layout effects | Huimei Zhou, Gen Tsutsui, Veeraraghavan S. Basker, Dechao Guo, Huiming Bu +1 more | 2021-01-12 |