Issued Patents 2021
Showing 1–7 of 7 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11189729 | Forming a sacrificial liner for dual channel devices | Kangguo Cheng, Dechao Guo, Sivananda K. Kanakasabapathy, Peng Xu | 2021-11-30 |
| 11139385 | Interface-less contacts to source/drain regions and gate electrode over active portion of device | Junli Wang, Veeraraghavan S. Basker | 2021-10-05 |
| 11094824 | Forming a sacrificial liner for dual channel devices | Kangguo Cheng, Dechao Guo, Sivananda K. Kanakasabapathy, Peng Xu | 2021-08-17 |
| 11088278 | Precise junction placement in vertical semiconductor devices using etch stop layers | Liying Jiang, Siyuranga O. Koswatta, Junli Wang | 2021-08-10 |
| 11011513 | Integrating a junction field effect transistor into a vertical field effect transistor | Brent A. Anderson, Terence B. Hook, Xuefeng Liu, Junli Wang | 2021-05-18 |
| 10937867 | Conformal doping for punch through stopper in fin field effect transistor devices | Sivananda K. Kanakasabapathy, Fee Li Lie, Tenko Yamashita | 2021-03-02 |
| 10892181 | Semiconductor device with mitigated local layout effects | Huimei Zhou, Gen Tsutsui, Veeraraghavan S. Basker, Andrew M. Greene, Dechao Guo +1 more | 2021-01-12 |