Issued Patents 2019
Showing 101–125 of 147 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10269812 | Forming contacts for VFETs | Lars Liebmann, Daniel Chanemougame, Chanro Park, John H. Zhang, Steven Bentley +1 more | 2019-04-23 |
| 10263122 | Methods, apparatus, and manufacturing system for self-aligned patterning of contacts in a vertical field effect transistor | Hui Zang, Tek Po Rinus Lee, Lars Liebmann | 2019-04-16 |
| 10263099 | Self-aligned finFET formation | Cheng Chi, Fee Li Lie, Chi-Chun Liu | 2019-04-16 |
| 10256231 | Forming vertical transistors and metal-insulator-metal capacitors on the same chip | Kangguo Cheng, Tenko Yamashita, Chun-Chen Yeh | 2019-04-09 |
| 10256316 | Steep-switch field effect transistor with integrated bi-stable resistive system | Julien Frougier, Nicolas Loubet, Daniel Chanemougame, Ali Razavieh, Kangguo Cheng | 2019-04-09 |
| 10256304 | High doped III-V source/drain junctions for field effect transistors | Xiuyu Cai, Qing Liu, Kejia Wang, Chun-Chen Yeh | 2019-04-09 |
| 10256158 | Insulated epitaxial structures in nanosheet complementary field effect transistors | Julien Frougier, Steven Bentley, Puneet Harischandra Suvarna | 2019-04-09 |
| 10249538 | Method of forming vertical field effect transistors with different gate lengths and a resulting structure | Yi Qi, Hsien-Ching Lo, Jianwei Peng, Wei Hong, Yanping Shen +5 more | 2019-04-02 |
| 10249728 | Air-gap gate sidewall spacer and method | Daniel Chanemougame, Andre P. Labonte, Lars Liebmann, Nigel G. Cave, Guillaume Bouche | 2019-04-02 |
| 10249726 | Methods of forming a protection layer on a semiconductor device and the resulting device | Chanro Park, Xiuyu Cai | 2019-04-02 |
| 10249535 | Forming TS cut for zero or negative TS extension and resulting device | Daniel Chanemougame, Lars Liebmann, Nigel G. Cave | 2019-04-02 |
| 10243074 | Vertical vacuum channel transistor | Qing Liu, Chun-Chen Yeh | 2019-03-26 |
| 10243053 | Gate contact structure positioned above an active region of a transistor device | Andre P. Labonte, Chanro Park | 2019-03-26 |
| 10242982 | Method for forming a protection device having an inner contact spacer and the resulting devices | Katsunori Onishi, Tek Po Rinus Lee | 2019-03-26 |
| 10236291 | Methods, apparatus and system for STI recess control for highly scaled finFET devices | Min Gyu Sung, Chanro Park, Hoon Kim, Kwan-Yong Lim | 2019-03-19 |
| 10236253 | Self-aligned local interconnect technology | Andrew M. Greene, Injo Ok, Balasubramanian Pranatharthiharan, Charan V. V. S. Surisetty | 2019-03-19 |
| 10236218 | Methods, apparatus and system for forming wrap-around contact with dual silicide | Julien Frougier, Hiroaki Niimi, Nigel G. Cave, Xusheng Wu | 2019-03-19 |
| 10236212 | Source and drain epitaxial semiconductor material integration for high voltage semiconductor devices | Balasubramanian Pranatharthiharan, Junli Wang | 2019-03-19 |
| 10236215 | Methods of forming gate contact structures and cross-coupled contact structures for transistor devices | Youngtag Woo, Daniel Chanemougame, Bipul C. Paul, Lars Liebmann, Heimanu Niebojewski +3 more | 2019-03-19 |
| 10236363 | Vertical field-effect transistors with controlled dimensions | Chun-Chen Yeh, Kangguo Cheng, Tenko Yamashita | 2019-03-19 |
| 10236292 | Complementary FETs with wrap around contacts and methods of forming same | Julien Frougier, Puneet Harischandra Suvarna, Hiroaki Niimi, Steven Bentley, Ali Razavieh | 2019-03-19 |
| 10229855 | Methods of forming transistor devices with different threshold voltages and the resulting devices | Hoon Kim, Min Gyu Sung, Chanro Park | 2019-03-12 |
| 10230000 | Vertical-transport transistors with self-aligned contacts | Emilie Bourjot, Daniel Chanemougame, Tek Po Rinus Lee, Hui Zang | 2019-03-12 |
| 10229987 | Epitaxial and silicide layer formation at top and bottom surfaces of semiconductor fins | Kangguo Cheng, Zuoguang Liu, Tenko Yamashita | 2019-03-12 |
| 10224207 | Forming a contact for a tall fin transistor | Kangguo Cheng, Tenko Yamashita | 2019-03-05 |