Issued Patents 2018
Showing 251–275 of 338 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9917179 | Stacked nanowire devices formed using lateral aspect ratio trapping | Karthik Balakrishnan, Pouya Hashemi, Alexander Reznicek | 2018-03-13 |
| 9917210 | FinFET transistor gate and epitaxy formation | Ruqiang Bao, Zhenxing Bi, Zheng Xu | 2018-03-13 |
| 9917199 | Method for reduced parasitic capacitance and contact resistance in extremely thin silicon-on-insulator (ETSOI) devices due to wrap-around structure of source/drain regions | Ramachandra Divakaruni | 2018-03-13 |
| 9917188 | Dielectric isolated fin with improved fin profile | Bruce B. Doris, Darsen D. Lu, Ali Khakifirooz, Kern Rim | 2018-03-13 |
| 9917175 | Tapered vertical FET having III-V channel | Karthik Balakrishnan, Pouya Hashemi, Alexander Reznicek | 2018-03-13 |
| 9917162 | Fabrication of vertical field effect transistor structure with controlled gate length | Ruilong Xie, Tenko Yamashita, Chun-Chen Yeh | 2018-03-13 |
| 9917154 | Strained and unstrained semiconductor device features formed on the same substrate | Juntao Li, Peng Xu | 2018-03-13 |
| 9917152 | Nanosheet transistors on bulk material | Ruilong Xie, Tenko Yamashita, Chun-Chen Yeh | 2018-03-13 |
| 9917106 | Embedded security circuit formed by directed self-assembly | Chi-Chun Liu | 2018-03-13 |
| 9917090 | Vertical antifuse structures | Juntao Li, Geng Wang, Qintao Zhang | 2018-03-13 |
| 9917082 | Approach to fabrication of an on-chip resistor with a field effect transistor | Veeraraghavan S. Basker, Theodorus E. Standaert, Junli Wang | 2018-03-13 |
| 9917081 | Semiconductor device including finFET and fin varactor | Junli Wang, Ruilong Xie, Tenko Yamashita | 2018-03-13 |
| 9917052 | Method of fabricating anti-fuse for silicon on insulator devices | Ali Khakifirooz, Juntao Li | 2018-03-13 |
| 9917021 | Porous silicon relaxation medium for dislocation free CMOS devices | Ramachandra Divakaruni, Jeehwan Kim, Juntao Li, Devendra K. Sadana | 2018-03-13 |
| 9917015 | Dual channel material for finFET for high performance CMOS | Bruce B. Doris, Pouya Hashemi, Ali Khakifirooz, Alexander Reznicek | 2018-03-13 |
| 9911656 | Wimpy device by selective laser annealing | Nicolas Loubet, Xin Miao, Alexander Reznicek | 2018-03-06 |
| 9911834 | Integrated strained stacked nanosheet FET | Ramachandra Divakaruni, Juntao Li, Xin Miao | 2018-03-06 |
| 9911741 | Dual channel material for finFET for high performance CMOS | Bruce B. Doris, Pouya Hashemi, Ali Khakifirooz, Alexander Reznicek | 2018-03-06 |
| 9911739 | III-V FinFET CMOS with III-V and germanium-containing channel closely spaced | Ali Khakifirooz, Alexander Reznicek, Ghavam G. Shahidi | 2018-03-06 |
| 9911662 | Forming a CMOS with dual strained channels | Pouya Hashemi, Ali Khakifirooz, Alexander Reznicek | 2018-03-06 |
| 9911657 | Semiconductor device including finFET and fin varactor | Junli Wang, Ruilong Xie, Tenko Yamashita | 2018-03-06 |
| 9905479 | Semiconductor devices with sidewall spacers of equal thickness | Balasubramanian Pranatharthiharan, Soon-Cheon Seo | 2018-02-27 |
| 9905671 | Forming a gate contact in the active area | Ruilong Xie, Tenko Yamashita | 2018-02-27 |
| 9905663 | Fabrication of a vertical fin field effect transistor with a reduced contact resistance | Xin Miao, Wenyu Xu, Chen Zhang | 2018-02-27 |
| 9905643 | Vertically aligned nanowire channels with source/drain interconnects for nanosheet transistors | Marc A. Bergendahl, Eric R. Miller, John R. Sporre, Sean Teehan | 2018-02-27 |