Issued Patents 2017
Showing 51–75 of 92 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9659931 | Fin cut on sit level | Kangguo Cheng, Ali Khakifirooz, Alexander Reznicek | 2017-05-23 |
| 9647062 | Silicon nanowire formation in replacement metal gate process | Chia-Yu Chen, Zuoguang Liu | 2017-05-09 |
| 9647093 | Fin cut for taper device | Kangguo Cheng, Ruilong Xie | 2017-05-09 |
| 9646969 | Spacer chamfering gate stack scheme | Hyun-Jin Cho, Hui Zang | 2017-05-09 |
| 9640442 | CMOS fin integration on SOI substrate | Effendi Leobandung | 2017-05-02 |
| 9640436 | MOSFET with asymmetric self-aligned contact | Kangguo Cheng, Xin Miao, Ruilong Xie | 2017-05-02 |
| 9634004 | Forming reliable contacts on tight semiconductor pitch | Xiuyu Cai, Kangguo Cheng, Ali Khakifirooz, Ruilong Xie | 2017-04-25 |
| 9634113 | Fully silicided linerless middle-of-line (MOL) contact | Joshua M. Rubin | 2017-04-25 |
| 9634010 | Field effect transistor device spacers | Rama Kambhampati, Junli Wang, Ruilong Xie | 2017-04-25 |
| 9627330 | Support for long channel length nanowire transistors | Karthik Balakrishnan, Isaac Lauer, Jeffrey W. Sleight | 2017-04-18 |
| 9620644 | Composite spacer enabling uniform doping in recessed fin devices | Veeraraghavan S. Basker, Zuoguang Liu, Chun-Chen Yeh | 2017-04-11 |
| 9613958 | Spacer chamfering gate stack scheme | Hyun-Jin Cho, Hui Zang | 2017-04-04 |
| 9607900 | Method and structure to fabricate closely packed hybrid nanowires at scaled pitch | Veeraraghavan S. Basker, Zuoguang Liu, Chun-Chen Yeh | 2017-03-28 |
| 9608099 | Nanowire semiconductor device | Wilfried Haensch, Effendi Leobandung | 2017-03-28 |
| 9608069 | Self aligned epitaxial based punch through control | Veeraraghavan S. Basker, Zuoguang Liu, Chun-Chen Yeh | 2017-03-28 |
| 9607903 | Method for forming field effect transistors | Rama Kambhampati, Junli Wang, Ruilong Xie | 2017-03-28 |
| 9601621 | Semiconductor device including dual spacer and uniform epitaxial buffer interface of embedded SiGe source/drain | Veeraraghavan S. Basker, Zuoguang Liu, Chun-Chen Yeh | 2017-03-21 |
| 9595597 | Semiconductor device including dual spacer and uniform epitaxial buffer interface of embedded SiGe source/drain | Veeraraghavan S. Basker, Zuoguang Liu, Chun-Chen Yeh | 2017-03-14 |
| 9595599 | Dielectric isolated SiGe fin on bulk substrate | Huiming Bu, Shogo Mochizuki | 2017-03-14 |
| 9595578 | Undercut insulating regions for silicon-on-insulator device | Kangguo Cheng, Bruce B. Doris, Balasubramanian Pranatharthiharan, Shom Ponoth, Theodorus E. Standaert | 2017-03-14 |
| 9589833 | Preventing leakage inside air-gap spacer during contact formation | Kangguo Cheng, Ruilong Xie | 2017-03-07 |
| 9589851 | Dipole-based contact structure to reduce metal-semiconductor contact resistance in MOSFETs | Huiming Bu, Hui-feng Li, Vijay Narayanan, Hiroaki Niimi | 2017-03-07 |
| 9583563 | Conformal doping for punch through stopper in fin field effect transistor devices | Huiming Bu, Sivananda K. Kanakasabapathy, Fee Li Lie | 2017-02-28 |
| 9577096 | Salicide formation on replacement metal gate finFet devices | Effendi Leobandung, Soon-Cheon Seo, Chun-Chen Yeh | 2017-02-21 |
| 9576956 | Method and structure of forming controllable unmerged epitaxial material | Xiuyu Cai, Kangguo Cheng, Ali Khakifirooz, Ruilong Xie | 2017-02-21 |