Issued Patents 2017
Showing 51–75 of 370 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9799568 | Field effect transistor including strained germanium fins | Karthik Balakrishnan, Pouya Hashemi, Alexander Reznicek | 2017-10-24 |
| 9799730 | FINFETs with high quality source/drain structures | Ali Khakifirooz, Alexander Reznicek, Charan V. Surisetty | 2017-10-24 |
| 9799746 | Preventing leakage inside air-gap spacer during contact formation | Ruilong Xie, Tenko Yamashita | 2017-10-24 |
| 9799749 | Vertical transport FET devices with uniform bottom spacer | Zhenxing Bi, Juntao Li, Xin Miao | 2017-10-24 |
| 9799655 | Flipped vertical field-effect-transistor | Xin Miao, Wenyu Xu, Chen Zhang | 2017-10-24 |
| 9799647 | Integrated device with P-I-N diodes and vertical field effect transistors | Juntao Li, Geng Wang, Qintao Zhang | 2017-10-24 |
| 9799765 | Formation of a bottom source-drain for vertical field-effect transistors | Marc A. Bergendahl, Fee Li Lie, Shogo Mochizuki, Junli Wang | 2017-10-24 |
| 9793113 | Semiconductor structure having insulator pillars and semiconductor material on substrate | Alexander Reznicek, Dominic J. Schepis, Bruce B. Doris, Pouya Hashemi | 2017-10-17 |
| 9793349 | Vertical single electron transistor formed by condensation | Xin Miao, Wenyu Xu, Chen Zhang | 2017-10-17 |
| 9793379 | FinFET spacer without substrate gouging or spacer foot | Veeraraghavan S. Basker, Ali Khakifirooz, Raghavasimhan Sreenivasan | 2017-10-17 |
| 9793341 | Deep trench capacitor with metal plate | Ali Khakifirooz, Davood Shahrjerdi, Herbert L. Ho | 2017-10-17 |
| 9793270 | Forming gates with varying length using sidewall image transfer | Juntao Li, Geng Wang, Qintao Zhang | 2017-10-17 |
| 9793400 | Semiconductor device including dual-layer source/drain region | Robert H. Dennard, Zhen Zhang | 2017-10-17 |
| 9793274 | CMOS transistors including gate spacers of the same thickness | Veeraraghavan S. Basker, Ali Khakifirooz | 2017-10-17 |
| 9793175 | FinFET devices having gate dielectric structures with different thicknesses on same semiconductor structure | Veeraraghavan S. Basker, Theodorus E. Standaert, Junli Wang | 2017-10-17 |
| 9793401 | Vertical field effect transistor including extension and stressors | Karthik Balakrishnan, Pouya Hashemi, Alexander Reznicek | 2017-10-17 |
| 9793157 | Etch stop for airgap protection | Ruilong Xie, Tenko Yamashita | 2017-10-17 |
| 9786851 | Transistor with trapeziod shaped carbon namotubes | Qing Cao, Zhengwen Li, Fei Liu, Zhen Zhang | 2017-10-10 |
| 9786666 | Method to form dual channel semiconductor material fins | Ryan O. Jung, Fee Li Lie, Eric R. Miller, John R. Sporre, Sean Teehan | 2017-10-10 |
| 9786737 | FinFET with reduced parasitic capacitance | Darsen D. Lu, Xin Miao, Tenko Yamashita | 2017-10-10 |
| 9786768 | III-V vertical field effect transistors with tunable bandgap source/drain regions | Karthik Balakrishnan, Pouya Hashemi, Alexander Reznicek | 2017-10-10 |
| 9786739 | Stacked nanosheets by aspect ratio trapping | Karthik Balakrishnan, Pouya Hashemi, Alexander Reznicek | 2017-10-10 |
| 9786563 | Fin pitch scaling for high voltage devices and low voltage devices on the same wafer | Veeraraghavan S. Basker, Theodorus E. Standaert, Junli Wang | 2017-10-10 |
| 9786497 | Double aspect ratio trapping | Bruce B. Doris, Ali Khakifirooz, Alexander Reznicek | 2017-10-10 |
| 9786782 | Source/drain FinFET channel stressor structure | Karthik Balakrishnan, Pouya Hashemi, Alexander Reznicek | 2017-10-10 |