KT

Kandabara Tapily

TL Tokyo Electron Limited: 87 patents #15 of 5,567Top 1%
TL Toyko Electron Limited: 1 patents #1 of 31Top 4%
📍 Albany, NY: #14 of 790 inventorsTop 2%
🗺 New York: #724 of 115,490 inventorsTop 1%
Overall (All Time): #18,685 of 4,157,543Top 1%
88
Patents All Time

Issued Patents All Time

Showing 26–50 of 88 patents

Patent #TitleCo-InventorsDate
11322401 Reverse contact and silicide process for three-dimensional semiconductor devices Jeffrey Smith, Lars Liebmann, Daniel Chanemougame, Hiroki Niimi, Subhadeep Kal +2 more 2022-05-03
11302588 Platform and method of operating for integrated end-to-end area-selective deposition process Robert D. Clark, Jason Mehigan 2022-04-12
11264289 Method for threshold voltage tuning through selective deposition of high-K metal gate (HKMG) film stacks Jeffrey Smith, Lars Liebmann, Daniel Chanemougame, Mark I. Gardner, H. Jim Fulford +1 more 2022-03-01
11264274 Reverse contact and silicide process for three-dimensional logic devices Jeffrey Smith, Hiroaki Niimi, Jodi Grzeskowiak, Daniel Chanemougame, Lars Liebmann +2 more 2022-03-01
11264254 Substrate processing tool with integrated metrology and method of using Robert D. Clark 2022-03-01
11251200 Coaxial contacts for 3D logic and memory Lars Liebmann, Jeffrey Smith, Anton J. deVilliers 2022-02-15
11251077 Method of forming a semiconductor device with air gaps for low capacitance interconnects 2022-02-15
11217583 Architecture design of monolithically integrated 3D CMOS logic and memory Lars Liebmann, Jeffrey Smith, Anton J. deVilliers 2022-01-04
11170992 Area selective deposition for cap layer formation in advanced contacts Gerrit J. Leusink 2021-11-09
11152268 Platform and method of operating for integrated end-to-end area-selective deposition process Robert D. Clark, Jason Mehigan 2021-10-19
11152207 Method of forming titanium nitride films with (200) crystallographic texture 2021-10-19
11114381 Power distribution network for 3D logic and memory Lars Liebmann, Jeffrey Smith, Anton J. deVilliers 2021-09-07
11101173 Self-aware and correcting heterogenous platform incorporating integrated semiconductor processing modules and method for using same Robert D. Clark, Jeffrey Smith, Angelique Raley, Qiang Zhao 2021-08-24
11031287 Fully self-aligned via with selective bilayer dielectric regrowth Jeffrey Smith 2021-06-08
11024535 Method for filling recessed features in semiconductor devices with a low-resistivity metal Kai-Hung Yu, David L. O'Meara, Nicholas Joy, Gyanaranjan Pattanaik, Robert D. Clark +3 more 2021-06-01
10991881 Method for controlling the forming voltage in resistive random access memory devices Steven P. Consiglio, Cory Wajda, Takaaki Tsunomura, Takashi Ando, Paul C. Jamison +3 more 2021-04-27
10930764 Extension region for a semiconductor device Jeffrey Smith, Nihar Mohanty, Anton J. deVilliers 2021-02-23
10923394 Platform and method of operating for integrated end-to-end fully self-aligned interconnect process Robert D. Clark, Kai-Hung Yu 2021-02-16
10916472 Self-aware and correcting heterogenous platform incorporating integrated semiconductor processing modules and method for using same Robert D. Clark, Jeffrey Smith, Angelique Raley, Qiang Zhao 2021-02-09
10886173 Platform and method of operating for integrated end-to-end fully self-aligned interconnect process Robert D. Clark, Kai-Hung Yu 2021-01-05
10847424 Method for forming a nanowire device Jeffrey Smith, Gerrit J. Leusink 2020-11-24
10847363 Method of selective deposition for forming fully self-aligned vias 2020-11-24
10833078 Semiconductor apparatus having stacked gates and method of manufacture thereof Jeffrey Smith, Anton J. deVilliers, Subhadeep Kal, Gerrit J. Leusink 2020-11-10
10790156 Atomic layer etching using a boron-containing gas and hydrogen fluoride gas Robert D. Clark 2020-09-29
10790149 Method of forming crystallographically stabilized ferroelectric hafnium zirconium based films for semiconductor devices Robert D. Clark 2020-09-29