Issued Patents All Time
Showing 51–75 of 204 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12176301 | Package structure and method for forming the same | Po-Chen Lai, Chin-Hua Wang, Ming-Chih Yew, Li-Ling Liao, Tsung-Yen Lee +1 more | 2024-12-24 |
| 12170238 | Semiconductor die package with multi-lid structures and method for forming the same | Shu-Shen Yeh, Che-Chia Yang, Chia-Kuei Hsu, Ming-Chih Yew, Shin-Puu Jeng | 2024-12-17 |
| 12154896 | Three-dimensional integrated circuit packages and methods of forming the same | Chin-Hua Wang, Yu-Sheng Lin, Chia-Kuei Hsu, Shu-Shen Yeh, Shin-Puu Jeng | 2024-11-26 |
| 12154888 | Semiconductor package and method of manufacturing the same | Chia-Kuei Hsu, Feng-Cheng Hsu, Ming-Chih Yew, Shuo-Mao Chen, Shin-Puu Jeng | 2024-11-26 |
| 12148684 | Package structure and method | Shu-Shen Yeh, Che-Chia Yang, Chin-Hua Wang, Chia-Kuei Hsu, Shin-Puu Jeng | 2024-11-19 |
| 12132021 | Method for fabricating semiconductor package | Chia-Kuei Hsu, Ming-Chih Yew, Po-Hao Tsai, Shin-Puu Jeng | 2024-10-29 |
| 12125822 | Method of manufacturing a semiconductor device package having dummy dies | Che-Chia Yang, Shu-Shen Yeh, Po-Chen Lai, Ming-Chih Yew, Shin-Puu Jeng | 2024-10-22 |
| 12119296 | Encircling a semiconductor device with stacked frames on a substrate | Chien-Hung Chen, Shu-Shen Yeh, Yu-Sheng Lin, Shin-Puu Jeng | 2024-10-15 |
| 12113033 | Chip package structure | Po-Chen Lai, Chin-Hua Wang, Ming-Chih Yew, Chia-Kuei Hsu, Li-Ling Liao +1 more | 2024-10-08 |
| 12113025 | Semiconductor package with dual sides of metal routing | Shin-Puu Jeng, Shuo-Mao Chen, Hsien-Wen Liu, Po-Yao Chuang, Feng-Cheng Hsu | 2024-10-08 |
| 12113006 | Semiconductor package | Chin-Hua Wang, Shu-Shen Yeh, Yu-Sheng Lin, Shin-Puu Jeng | 2024-10-08 |
| 12100666 | Method for forming chip package structure | Shin-Puu Jeng, Techi Wong, Ming-Chih Yew, Po-Hao Tsai, Po-Yao Chuang | 2024-09-24 |
| 12100664 | Semiconductor device with curved conductive lines and method of forming the same | Chia-Kuei Hsu, Ming-Chih Yew, Shu-Shen Yeh, Che-Chia Yang, Shin-Puu Jeng | 2024-09-24 |
| 12094828 | Eccentric via structures for stress reduction | Shu-Shen Yeh, Che-Chia Yang, Chia-Kuei Hsu, Shin-Puu Jeng, Chia-Hsiang Lin | 2024-09-17 |
| 12094810 | Reinforcing package using reinforcing patches | Chia-Kuei Hsu, Ming-Chih Yew, Shuo-Mao Chen, Feng-Cheng Hsu, Shin-Puu Jeng | 2024-09-17 |
| 12087705 | Package structure with warpage-control element | Yu-Sheng Lin, Chien-Hung Chen, Po-Chen Lai, Shin-Puu Jeng | 2024-09-10 |
| 12074083 | Semiconductor die package with thermal management features | Yu-Sheng Lin, Shu-Shen Yeh, Chin-Hua Wang, Shin-Puu Jeng | 2024-08-27 |
| 12068260 | Semiconductor die package with ring structure and method for forming the same | Yu-Chen Lee, Shu-Shen Yeh, Chia-Kuei Hsu, Shin-Puu Jeng | 2024-08-20 |
| 12057363 | Chip package structure with multiple gap-filling layers and fabricating method thereof | Po-Chen Lai, Ming-Chih Yew, Chin-Hua Wang, Shin-Puu Jeng | 2024-08-06 |
| 12040285 | Structure and formation method of chip package with reinforcing structures | Po-Chen Lai, Ming-Chih Yew, Yu-Sheng Lin, Shin-Puu Jeng | 2024-07-16 |
| 12040267 | Organic interposer including intra-die structural reinforcement structures and methods of forming the same | Li-Ling Liao, Ming-Chih Yew, Chia-Kuei Hsu, Shu-Shen Yeh, Shin-Puu Jeng | 2024-07-16 |
| 12035475 | Semiconductor package with stress reduction design and method for forming the same | Chia-Kuei Hsu, Ming-Chih Yew, Po-Chen Lai, Shin-Puu Jeng | 2024-07-09 |
| 12033947 | Semiconductor package structure and method for forming the same | Chia-Kuei Hsu, Ming-Chih Yew, Shu-Shen Yeh, Shin-Puu Jeng | 2024-07-09 |
| 12033928 | Manufacturing method of semiconductor package | Chia-Kuei Hsu, Ming-Chih Yew, Shu-Shen Yeh, Shin-Puu Jeng | 2024-07-09 |
| 12033913 | Chip package structure with lid and method for forming the same | Shu-Shen Yeh, Che-Chia Yang, Yu-Sheng Lin, Chin-Hua Wang, Shin-Puu Jeng | 2024-07-09 |