LL

Li-Te Lin

TSMC: 130 patents #163 of 12,232Top 2%
GC Giga-Byte Technology Co.: 1 patents #112 of 245Top 50%
TL Tsmc Nanjing Company, Limited: 1 patents #68 of 113Top 65%
Overall (All Time): #8,219 of 4,157,543Top 1%
131
Patents All Time

Issued Patents All Time

Showing 101–125 of 131 patents

Patent #TitleCo-InventorsDate
10164067 Method of fabricating a semiconductor device Yi-Chen Lo, Yu-Lien Huang 2018-12-25
10157773 Semiconductor structure having layer with re-entrant profile and method of forming the same Yi-Shan Chen, Chan Syun David Yang, Pinyen Lin 2018-12-18
10157751 Method for manufacturing semiconductor device Jung-Hao Chang, Chao-Hsien Huang, Wen-Ting Lan, Shi Ning Ju, Kuo-Cheng Ching 2018-12-18
10032887 Method of forming a contact Yu-Lien Huang, Yuan-Hung Chiu, Han-Yu Lin 2018-07-24
9627258 Method of forming a contact Yu-Lien Huang, Yuan-Hung Chiu, Han-Yu Lin 2017-04-18
9196491 End-cut first approach for critical dimension control Meng-Jun Wang, Ya Hui Chang, Hui Ouyang 2015-11-24
8563410 End-cut first approach for critical dimension control Meng-Jun Wang, Ya Hui Chang, Hui Ouyang 2013-10-22
8404546 Source/drain carbon implant and RTA anneal, pre-SiGe deposition Wei-Yen Woon, Chun-Feng Nieh, Ching-Yi Chen, Hsun Chang, Chung-Ru Yang 2013-03-26
8212253 Shallow junction formation and high dopant activation rate of MOS devices Chun-Feng Nieh, Keh-Chiang Ku, Nai-Han Cheng, Chi-Chun Chen 2012-07-03
8039375 Shallow junction formation and high dopant activation rate of MOS devices Chun-Feng Nieh, Keh-Chiang Ku, Nai-Han Cheng, Chi-Chun Chen 2011-10-18
7838887 Source/drain carbon implant and RTA anneal, pre-SiGe deposition Wei-Yen Woon, Chun-Feng Nieh, Ching-Yi Chen, Hsun Chang, Chung-Ru Yang 2010-11-23
7816217 Multi-step epitaxial process for depositing Si/SiGe Pang-Yen Tsai, Chih-Chien Chang, Tze-Liang Lee 2010-10-19
7612389 Embedded SiGe stressor with tensile strain for NMOS current enhancement Chih-Chien Chang, Tze-Liang Lee 2009-11-03
7494884 SiGe selective growth without a hard mask Hsien-Hsin Lin, Tze-Liang Lee, Ming-Hua Yu 2009-02-24
7390753 In-situ plasma treatment of advanced resists in fine pattern definition Yui Wang, Huan-Just Lin, Yuan-Hung Chiu, Hun-Jan Tao 2008-06-24
7307009 Phosphoric acid free process for polysilicon gate definition Fang Chen, Huin-Jer Lin, Yuan-Hung Chiu, Hun-Jan Tao 2007-12-11
7253112 Dual damascene process Bang-Chien Ho, Jian-Hong Chen, Tsang-Jiuh Wu, Li-Chih Chao, Hua-Tai Lin +1 more 2007-08-07
7179715 Method for controlling spacer oxide loss Ju-Chien Chiang, Shu-Huei Sun 2007-02-20
7109085 Etching process to avoid polysilicon notching Shiang-Bau Wang, Ming-Ching Chang, Ryan Chia-Jen Chen, Yuan-Hung Chiu, Hun-Jan Tao 2006-09-19
6864174 Iteratively selective gas flow control and dynamic database to achieve CD uniformity Yui Wang, Ming-Ching Chang, Li-Shung Chen, Huain-Jelin Lin, Yuan-Hong Chin +1 more 2005-03-08
6849531 Phosphoric acid free process for polysilicon gate definition Fang-Chen Cheng, Huin-Jer Lin, Yuan-Hung Chiu, Hun-Jan Tao 2005-02-01
6835578 Test structure for differentiating the line and via contribution in stress migration Chin-Chiu Hsia 2004-12-28
6797630 Partial via hard mask open on low-k dual damascene etch with dual hard mask (DHM) approach Tsang-Jiuh Wu, Chen-Nan Yeh, Li-Chih Chao 2004-09-28
6797627 Dry-wet-dry solvent-free process after stop layer etch in dual damascene process Hsin-Ching Shih, Yi-Nien Su, Li-Chie Chiao 2004-09-28
6794302 Dynamic feed forward temperature control to achieve CD etching uniformity Li-Shiun Chen, Ming-Ching Chang, Huan-Just Lin, Yung-Hog Chiu, Hun-Jan Tao 2004-09-21